US-12625612-B2 - Electronic device for managing memory and operating method thereof

US12625612B2US 12625612 B2US12625612 B2US 12625612B2US-12625612-B2

Abstract

An example electronic device may include first memory configured to store data related to a file, a second memory configured to temporarily store at least part of the data related to the file, and a processor operatively connected to the first memory and the second memory, wherein the processor may be configured to: monitor access to the data related to the file stored in the first memory for a specified time based on performing of an application program, configure a first access pattern for a first group including the at least part of the data related to the file stored in the first memory based on a monitoring result, and load data of the first group related to the file stored in the first memory into the second memory based on the first access pattern, based on the application program requesting access to the data included in the first group.

Inventors

Jaeseon SIM
Chulmin Kim
Ohoon Kwon
Jaewon Kim
Sooyong SUK
YongTaek Lee

Assignees

SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20220317
Priority Date: 20210330

Claims (9)

1 . An electronic device comprising: first memory storing data related to a file; second memory temporarily storing at least part of the data related to the file; and at least one processor, comprising processing circuitry, operatively connected to the first memory and the second memory, wherein the at least one processor is configured to: determine whether a usage level of the processor satisfies a specified first condition; determine whether a size of available space of the second memory satisfies a specified second condition; when the usage level of the processor satisfies the specified first condition and the size of available space of the second memory satisfies the specified second condition, monitor access by an application program to the data related to the file stored in the first memory for a specified time; when a size of monitoring information collected by the monitoring of access to the data related to the file satisfies a specified third condition, configure a first access pattern for a first group including the at least part of the data related to the file stored in the first memory based on a monitoring result; and when the application program requests access to data comprised in the first group, load data of the first group related to the file stored in the first memory into the second memory based on the first access pattern, wherein the monitoring of the access to the data related to the file stored in the first memory is restricted when the usage level of the processor does not satisfy the specified first condition or the size of available space of the second memory does not satisfy the specified second condition.
2 . The electronic device of claim 1 , wherein the first access pattern comprises at least one of an access pattern for loading at least one page included in a loading size configured for each group into the second memory, an access pattern for loading nonconsecutive pages into the second memory based on a page access pattern, an access pattern for reclaiming a plurality of pages at once from the second memory based on a page reclamation pattern, an access pattern for loading consecutive pages into the second memory based on the page access pattern, or an access pattern for loading a plurality of pages comprised in a fixed loading size into the second memory.
3 . The electronic device of claim 1 , wherein the at least one processor is configured to configure an access pattern for a second group different from the first group, among the data related to the file stored in the first memory as a second access pattern, based on the monitoring result.
4 . The electronic device of claim 1 , wherein the at least one processor is configured to: monitor access to the data related to the file stored in the first memory based on the first access pattern being configured for the first group, and configure a third access pattern for a third group including at least part of the data related to the file based on the monitoring result, based on determining that an error occurs in the first access pattern based on the monitoring result, and wherein the third group is the same as the first group or comprises at least part of the first group.
5 . The electronic device of claim 4 , wherein the at least one processor is configured to determine that the error occurs in the first access pattern based on a number of accesses to the data comprised in the first group among the data related to the file stored in the first memory satisfying a specified four condition.
6 . The electronic device of claim 1 , wherein the at least one processor is configured to: monitor access to the data related to the file stored in the first memory based on the first access pattern being configured for the first group, and configure a second access pattern for a second group including at least part of the data related to the file based on the monitoring result based on a structure of the file being changed.
7 . The electronic device of claim 6 , wherein the at least one processor is configured to determine that the structure of the file is changed based on new data being added to the file stored in the first memory, the file stored in the first memory being deleted, or at least part of the file stored in the first memory being updated.
8 . The electronic device of claim 1 , wherein the first memory comprises a nonvolatile memory, and the second memory comprises a volatile memory.
9 . A non-transitory computer-readable storage medium storing instructions which, when executed by at least one processor of an electronic device comprising first memory storing data related to a file and second memory temporarily storing at least part of the data related to the file, cause the electronic device to perform operations comprising: determining whether a usage level of a processor of the electronic device satisfies a specified first condition; determining whether a size of available space of the second memory satisfies a specified second condition; when the usage level of the processor satisfies the specified first condition and the size of available space of the second memory satisfies the specified second condition, monitoring access by an application program to the data related to the file stored in the first memory for a specified time; when a size of monitoring information collected by the monitoring of access to the data related to the file satisfies a specified third condition, configuring a first access pattern for a first group including the at least part of the data related to the file stored in the first memory based on a monitoring result; and when the application program requests access to data comprised in the first group, loading data of the first group related to the file stored in the first memory into the second memory based on the first access pattern, wherein the monitoring of the access to the data related to the file stored in the first memory is restricted when the usage level of the processor does not satisfy the specified first condition or the size of available space of the second memory does not satisfy the specified second condition.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of International Application No. PCT/KR2022/002811 designating the United States, filed on Feb. 25, 2022, in the Korean Intellectual Property Receiving Office and claiming priority to Korean Patent Application No. 10-2021-0041401 filed on Mar. 30, 2021, in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entireties. BACKGROUND Field The disclosure relates to a device and a method for managing a memory in an electronic device. Description of Related Art With the development of information and communication technology and semiconductor technology, electronic devices may provide various multimedia functions and may thus generate and/or store various sizes and types of data. An electronic device may employ a virtual memory management technique for efficiently storing and/or managing data. For example, the virtual memory management technique is a method for managing data by matching a main memory (e.g., a dynamic random access memory (DRAM)) to a storage (e.g., a nonvolatile memory) and may include a demand paging method of loading at least part of data (e.g., a page) required by a processor among data stored in a storage into a main memory and processing the data. When a demand paging method is employed, an electronic device may use a page cache for prefetching at least part of data stored in a storage into a main memory before a process requests the data. For example, when using the page cache, the electronic device may prefetch not only the data (e.g., a page) requested by the processor but also other data (e.g., a page) into the main memory, based on a predetermined memory access pattern. The predefined memory access pattern may include a memory access pattern configured based on an application program requiring the data. However, when a predefined memory access pattern for prefetching data into the main memory and a pattern for the application program to use the data are different, the electronic device may experience a decrease in memory management efficiency. SUMMARY Embodiments of the disclosure disclose a device and a method for adaptively generating and/or applying a memory access pattern for a page cache in an electronic device. According to various example embodiments, an electronic device may include: a first memory configured to store data related to a file, a second memory configured to temporarily store at least part of the data related to the file, and a processor operatively connected to the first memory and the second memory, wherein the processor may be configured to: monitor access to the data related to the file stored in the first memory for a specified time, based on performing of an application program, configure a first access pattern for a first group including the at least part of the data related to the file stored in the first memory, based on a monitoring result, and load data of the first group related to the file stored in the first memory into the second memory, based on the first access pattern, based on the application program requesting access to the data included in the first group. According to various example embodiments, a method of operating an electronic device including a first memory configured to store data related to a file and a second memory configured to temporarily store at least part of the data related to the file may include: monitoring access to the data related to the file stored in the first memory for a specified time, based on performing of an application program, configuring a first access pattern for a first group including the at least part of the data related to the file stored in the first memory, based on a monitoring result, and loading data of the first group related to the file stored in the first memory into the second memory, based on the first access pattern, based on the application program requesting access to the data included in the first group. According to various example embodiments of the disclosure, an electronic device may adaptively generate and/or apply a memory access pattern for a page cache, based on the result of monitoring access to data stored in a storage, thereby reducing a delay in accessing a file and increasing efficiency in memory management. BRIEF DESCRIPTION OF THE DRAWINGS The above and other aspects, features and advantages of certain embodiments of the present disclosure will be more apparent from the following detailed description, taken in conjunction with the accompanying drawings, in which: FIG. 1 is a block diagram illustrating an example electronic device in a network environment according to various embodiments; FIG. 2 is a block diagram illustrating an example configuration of an electronic device for memory management according to various embodiments; FIG. 3 is a block diagram illustrating an example configuration of a program according to various embodiments; FIG. 4 is