US-12625636-B2 - Repair operation techniques

US12625636B2US 12625636 B2US12625636 B2US 12625636B2US-12625636-B2

Abstract

Methods, systems, and devices for repair operation techniques are described. A memory device may detect a failure of a read operation associated with a physical row address of a memory die. The memory device may store information associated with the physical row address before performing a media management operation and after detecting the failure. Additionally or alternatively, the memory device may initiate a counter based on detecting the failure and may increment a value of the counter for each media management operation performed after detecting the failure. The memory device may send a command or other information to perform a repair operation for the physical row address. The memory device may determine the physical row address for the repair operation (e.g., despite media management operations) based on the stored information or the value of the counter, and may perform the repair operation on the physical row address.

Inventors

Alan J. Wilson
Donald M. Morgan

Assignees

MICRON TECHNOLOGY, INC.

Dates

Publication Date: 20260512
Application Date: 20240815

Claims (20)

1 . A method, comprising: initiating a counter at a first time and in response to a failure of a read operation associated with a physical row address; incrementing a value of the counter for one or more media management operations performed after initiation of the counter; and performing a repair operation on the physical row address based at least in part on the value of the counter and a logical row address associated with the physical row address at the first time.
2 . The method of claim 1 , further comprising: storing, in response to the failure, the logical row address that maps to the physical row address at the first time.
3 . The method of claim 2 , wherein storing the logical row address comprises: storing the logical row address of a controller of a memory device, wherein the memory device comprises the physical row address.
4 . The method of claim 1 , wherein the one or more media management operations comprise wear leveling cycles.
5 . The method of claim 1 , wherein incrementing the counter comprises: incrementing the value of the counter in association with performance of the one or more media management operations on a first memory bank that includes the physical row address.
6 . The method of claim 5 , further comprising: performing, after the first time, one or more second media management operations on a second memory bank different than the first memory bank, and wherein the one or more media management operations are exclusive of the one or more second media management operations.
7 . The method of claim 1 , further comprising: sending, at a second time, a command to perform the repair operation associated with the physical row address, the command comprising the logical row address associated with the physical row address at the first time associated with the failure of the read operation, the command further comprising the value of the counter at the second time.
8 . The method of claim 7 , wherein the command comprises one of an activation command or a precharge command.
9 . The method of claim 1 , further comprising: determining, using the value of the counter, a count of a wear leveling engine at the first time; and determining, using the wear leveling engine set to the count, a logical address to physical address mapping for the physical row address at the first time, wherein performing the repair operation is based at least in part on the logical address to physical address mapping.
10 . The method of claim 9 , further comprising: resetting, after determining the logical address to physical address mapping, the wear leveling engine to a current value of the counter.
11 . An apparatus, comprising: a memory device; and a controller coupled with the memory device and configured to cause the apparatus to: initiate, at a first time and in response to a failure of a read operation associated with a physical row address, a counter; increment a value of the counter for one or more media management operations performed after initiation of the counter; and perform a repair operation on the physical row address based at least in part on a logical row address associated with the physical row address at the first time and the value of the counter.
12 . The apparatus of claim 11 , wherein the controller is further configured to cause the apparatus to: store, in response to the failure, the logical row address that maps to the physical row address at the first time.
13 . The apparatus of claim 12 , wherein to store the logical row address, the controller is further configured to cause the apparatus to: store the logical row address of the controller of the memory device, wherein the memory device comprises the physical row address.
14 . The apparatus of claim 11 , wherein the one or more media management operations comprise wear leveling cycles.
15 . The apparatus of claim 11 , wherein to increment the counter, the controller is further configured to cause the apparatus to: increment the value of the counter in association with performance of the one or more media management operations on a first memory bank that includes the physical row address.
16 . The apparatus of claim 15 , wherein the controller is further configured to cause the apparatus to: perform, after the first time, one or more second media management operations on a second memory bank different than the first memory bank, and wherein the one or more media management operations are exclusive of the one or more second media management operations.
17 . The apparatus of claim 11 , wherein the controller is further configured to cause the apparatus to: send, at a second time, a command to perform the repair operation associated with the physical row address, the command comprising the logical row address associated with the physical row address at the first time associated with the failure of the read operation, the command further comprising the value of the counter at the second time.
18 . The apparatus of claim 17 , wherein the command comprises one of an activation command or a precharge command.
19 . The apparatus of claim 11 , wherein the controller is further configured to cause the apparatus to: determine, using the value of the counter, a count of a wear leveling engine at the first time; and determine, using the wear leveling engine set to the count, a logical address to physical address mapping for the physical row address at the first time, wherein performing the repair operation is based at least in part on the logical address to physical address mapping.
20 . A non-transitory computer-readable medium storing code for wireless communications at a memory device, the code comprising instructions executable by one or more processors to: initiate, at a first time and in response to a failure of a read operation associated with a physical row address, a counter; increment a value of the counter for one or more media management operations performed after initiation of the counter; and perform a repair operation on the physical row address based at least in part on a logical row address associated with the physical row address at the first time and the value of the counter.

Description

CROSS REFERENCE The present Application for Patent is a continuation of U.S. patent application Ser. No. 17/983,213 by Wilson et al., entitled “REPAIR OPERATION TECHNIQUES,” filed Nov. 8, 2022, which is continuation of U.S. patent application Ser. No. 17/197,733 by Wilson et al., entitled “REPAIR OPERATION TECHNIQUES,” filed Mar. 10, 2021, each of which is assigned to the assignee hereof, and each of which is expressly incorporated by reference in its entirety herein. FIELD OF TECHNOLOGY The following relates generally to one or more systems for memory and more specifically to repair operation techniques. BACKGROUND Memory devices are widely used to store information in various electronic devices such as computers, user devices, cameras, digital displays, and the like. Information is stored by programming memory cells within a memory device to various states. For example, binary memory cells may be programmed to one of two supported states, often denoted by a logic 1 or a logic 0. In some examples, a single memory cell may support more than two states, any one of which may be stored. To access the stored information, a component of the device may read, or sense, at least one stored state in the memory device. To store information, a component of the device may write, or program, the state in the memory device. Various types of memory devices exist, including magnetic hard disks, random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), and others. Memory devices may be volatile or non-volatile. Non-volatile memory, e.g., FeRAM, may maintain their stored logic state for extended periods of time even in the absence of an external power source. Volatile memory devices, e.g., DRAM, may lose their stored state when disconnected from an external power source. FeRAM may be able to achieve densities similar to volatile memory but may have non-volatile properties due to the use of a ferroelectric capacitor as a storage device. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates an example of a system that supports repair operation techniques in accordance with examples as disclosed herein. FIGS. 2 through 5 illustrate examples of process flows that support repair operation techniques in accordance with examples as disclosed herein. FIG. 6 shows a block diagram of a memory device that supports repair operation techniques in accordance with examples as disclosed herein. FIGS. 7 and 8 show flowcharts illustrating a method or methods that support repair operation techniques in accordance with examples as disclosed herein. DETAILED DESCRIPTION A memory device may perform repair operations in response to detecting a failure of an operation to access data stored in the memory device. For example, after detecting a failure of a read operation associated with a physical row address of a memory die of the memory device, the memory device may store a logical row address corresponding to the physical row address at the time of the failure. However, in some cases, before performing a repair operation to replace the failed physical row address, the memory device may perform one or more media management operations (e.g., wear leveling operations, garbage collection operations, security operations, or other media management operations) in which a mapping of logical addresses (e.g., the logical row address) to physical addresses (e.g., the physical row address) may be updated. A command to perform the repair operation may include the stored logical row address that the memory device uses to determine the failed physical row address. But if, as a result of performing the one or more media management operations too soon, the mapping of the stored logical row address has changed to indicate a physical row address different than the failed physical row address, the memory device may repair an incorrect physical row address or otherwise fail to repair the failed physical row address. Techniques, systems, and devices are described herein for improving the reliability of repair operations by performing one or more operations that enable accurate storage or generation of a failed physical row address. For example, based on detecting the failure associated with the physical row address and before performing a media management operation, the memory device may store information associated with the failed physical row address, for example, at the memory die (e.g., a local memory controller, one or more memory cells of a memory array, one or more mode registers, or a combination thereof). In some examples, the memory device may store the information at the memory die by sending a command or other information that indicates the information before performing the media management operation. For example, the memory device may send the command or the other information that in