US-12625749-B2 - Energy friendly event processing task model

US12625749B2US 12625749 B2US12625749 B2US 12625749B2US-12625749-B2

Abstract

An RTOS includes an event processor construct. The event processor has a task priority and an event processor handler. A stack for the event processor is allocated by the RTOS. The event processor handler is called by the RTOS each time an event is posted by an interrupt request handler or another task. Once processing of the event completes, the event processor handler returns (as opposed to remaining in an infinite loop) thereby allowing the stack allocated to the event processor to not be retained on entry into a sleep state and the memory bank containing the stack to be powered down during a sleep state.

Inventors

Jean-Francois Deschenes

Assignees

SILICON LABORATORIES INC.

Dates

Publication Date: 20260512
Application Date: 20230224

Claims (15)

1 . A method in a system having a real time operating system (RTOS) comprising: creating an event processor when the system wakes up from a sleep state, the event processor including a priority and a stack size but without a memory address and without a synchronization object; allocating an event processor stack in a memory bank for the event processor; posting an event to the event processor; calling an event processor handler corresponding to the event; processing the event in the event processor handler; returning from the event processor handler responsive to completion of processing the event; responsive to a decision to enter another sleep state, turning off the memory bank containing the event processor stack; and upon waking up from the other sleep state again creating the event processor.
2 . The method as recited in claim 1 , further comprising an interrupt handler posting the event to the event processor.
3 . The method as recited in claim 1 , further comprising passing the event as an argument to the event processor handler.
4 . The method as recited in claim 1 , further comprising a scheduler in the RTOS scheduling the event processor to execute once responsive to the event being posted to the event processor.
5 . The method as recited in claim 1 , further comprising prior to entering the other sleep state allocating another event processor stack for another event processor, the other event processor stack being contiguous with the event processor stack in the memory bank.
6 . The method as recited in claim 1 , further comprising allocating a plurality of event processor stacks for a plurality of event processors, including the event processor, in one or more memory banks and turning off the one or more memory banks responsive to entering a sleep state.
7 . A system comprising: a processor; a memory storing a real time operating system (RTOS) for execution by the processor; an event processor created after waking up from a sleep state, the event processor including a priority and a stack size but not including a memory address or a synchronization object; a memory manager to allocate a stack in a memory bank in conjunction with the RTOS, the stack being associated with the event processor; wherein the RTOS is responsive to an event being posted to the event processor to call an event processor handler corresponding to the event to process the event; wherein the event processor handler is responsive to completion of processing the event to return; wherein responsive to a decision to enter another sleep state, memory containing the stack associated with the event processor is turned off; and wherein the event processor is created again upon waking up from the other sleep state.
8 . The system as recited in claim 7 , further comprising an interrupt handler responsive to an interrupt to post the event to the event processor.
9 . The system as recited in claim 7 wherein the event is passed as an argument to the event processor handler.
10 . The system as recited in claim 7 further comprising a scheduler in the RTOS to schedule the event processor to execute once responsive to the event being posted to the event processor.
11 . The system as recited in claim 7 , wherein the RTOS in conjunction with the memory manager allocates a plurality of event processor stacks for a plurality of event processors, including the event processor stack, in the memory bank and the memory bank is turned off responsive to a decision to enter a sleep state.
12 . The system as recited in claim 7 wherein the RTOS gives equal priority to the event processor and another task.
13 . The system as recited in claim 7 , wherein the stack is shared between the event processor and another event processor that is mutually exclusive with the event processor.
14 . A non-transitory computer-readable medium having instructions embedded thereon, wherein the instructions, when performed on a processor, cause a processor to: create an event processor when the processor wakes up from a sleep state, the event processor including a priority and a stack size but not including a memory address or a synchronization object; allocate a stack processor in a memory bank to the event processor; post an event to the event processor responsive to an occurrence of a system condition, the event processor being part of a real time operating system (RTOS); call an event processor handler, the event processor handler corresponding to the event; process the event in the event processor handler; return from the event processor handler responsive to completion of processing the event; and cause the memory bank to power down responsive to a decision to enter another sleep state.
15 . The non-transitory computer-readable medium as recited in claim 14 , further comprising an interrupt handler to post the event to the event processor responsive to the occurrence of the system condition.

Description

BACKGROUND Field of the Invention This disclosure relates to real time operating systems (RTOS) and in particular to RTOS implementations that achieve greater power savings during sleep states. Description of the Related Art Leakage current in static random access memory (SRAM) consumes power even when the SRAM is not being actively used. As memory size increases, the amount of SRAM leakage current also increases. Reducing leakage current from SRAM can save power, which is particularly useful for Internet-of-Things (IOT) applications that have power supplied by battery. One way to save power and reduce leakage current is to shut off parts of memory that are not being used when the device enters a sleep state. It would be desirable to shut off more memory during sleep states to increase power savings, particularly for IOT devices. SUMMARY OF EMBODIMENTS OF THE INVENTION Accordingly, in an embodiment a method in a system having a real time operating system (RTOS) includes posting an event to an event processor. In response to the posting, the RTOS calls an event processor handler corresponding to the event and the event processor handler processes the event. After completion of processing the event the event processor handler returns. That allows the stack to not have the need to be retained during sleep states and the memory bank containing the stack allocated for the event processor can be powered down during sleep states. In another embodiment a system includes a processor and a memory storing a real time operating system (RTOS) for execution by the processor. The RTOS is responsive to an event being posted to an event processor in the RTOS to call an event processor handler corresponding to the event to process the event and the event processor handler is responsive to completion of processing the event to return. In another embodiment a non-transitory computer-readable medium has instructions embedded thereon that cause a processor to allocate a stack to an event processor in a memory bank. Software, such as an interrupt service routine, posts an event to the event processor responsive to occurrence of a system condition such as a condition indicated by an interrupt. A real time operating system (RTOS) calls an event processor handler corresponding to the event and the event processor handler processes the event and returns responsive to completion of processing the event. BRIEF DESCRIPTION OF THE DRAWINGS The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings. FIG. 1 illustrates a high-level diagram of an embodiment of a system that includes software components including RTOS and application programs, a memory manager, and an SRAM. FIG. 2A illustrates pseudo-code for creation of a conventional task. FIG. 2B illustrates pseudo-code for a conventional task handler. FIG. 2C illustrates pseudo-code for an interrupt handler that posts an event to a queue. FIG. 3 illustrates a task stack associated with a conventional task. FIG. 4A illustrates pseudo-code for creation of an event processor. FIG. 4B illustrates pseudo-code for an event processor handler. FIG. 4C illustrates pseudo-code for interrupt handler that posts straight to the event processor. FIG. 5 illustrates a high level block diagram of an IOT system that incorporates an embodiment of the RTOS that achieve greater power savings during sleep states. FIG. 6 illustrates a memory bank with contiguous event processor stacks. FIG. 7 illustrates two task stacks associated with a task model according to an embodiment. FIG. 8A illustrates pseudo-code for creation of a task according to an embodiment that allocates a first stack for the event loop processing. FIG. 8B illustrates pseudo-code for a task handler that allocates a second stack for processing the event. The use of the same reference symbols in different drawings indicates similar or identical items. DETAILED DESCRIPTION FIG. 1 illustrates a high-level diagram of an embodiment of a system 100 that includes software components including RTOS 102 and application programs 104, the memory manager 106, which may operate as a standard memory manager, and the SRAM 108. The SRAM 108 is divided into the various memory banks (BANK 0-BANK N). The term “memory bank” as used herein refers to a block of memory that can be individually powered down during sleep states. The memory manager 104 allocates stacks in the memory banks as described further herein. The software components provide memory requests to the memory manager 106. The software components, including the RTOS and application programs, typically have ten to twenty stacks allocated. The memory manager includes various functions for each aspect of the memory manager including heap, memory protection, and garbage collection and provides an application programing interface (API) for use by application programs to access the funct