US-12625838-B2 - Retimer path control method, apparatus, and system

US12625838B2US 12625838 B2US12625838 B2US 12625838B2US-12625838-B2

Abstract

A retimer path control method includes: receiving a first bitstream, where the first bitstream includes a first field, the first field includes capability information of a retimer, and the capability information indicates whether the retimer supports a low latency path; and sending a second bitstream to the retimer, where the second bitstream includes a second field, the second field includes first enter control information, the first enter control information indicates whether the retimer enters the low latency path, and the low latency path is a path with lowest latency in data transmission paths of the retimer. The path of the retimer can be effectively controlled.

Inventors

Er NIE

Assignees

HUAWEI TECHNOLOGIES CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20240724

Claims (20)

1 . A retimer path control method for wired serial data transmission, wherein the method comprises: receiving, by a path control apparatus, a first bitstream, wherein the first bitstream comprises a first field, wherein the first field comprises capability information of a retimer, and wherein the capability information indicates whether the retimer supports a low latency path; and sending, by the path control apparatus, a second bitstream to the retimer, wherein the second bitstream comprises a second field, wherein the second field comprises first enter control information, wherein the first enter control information indicates whether the retimer is to enter the low latency path, and wherein the low latency path is a path with lowest latency in data transmission paths of the retimer; wherein the second bitstream further comprises a fifth field, wherein the fifth field carries state information, and wherein the state information indicates whether the retimer has entered the low latency path or has exited the low latency path.
2 . The method according to claim 1 , wherein the second field further comprises first exit control information, and the first exit control information indicates whether the retimer is to exit the low latency path.
3 . The method according to claim 1 , further comprising: sending a third bitstream to the retimer, wherein the third bitstream comprises a third field, and the third field carries the capability information.
4 . The method according to claim 3 , further comprising: receiving a fourth bitstream, wherein the fourth bitstream comprises a fourth field, wherein the fourth field comprises second enter control information and second exit control information, wherein the second enter control information indicates whether the retimer is to enter the low latency path, and wherein the second exit control information indicates whether the retimer is to exit the low latency path.
5 . The method according to claim 4 , wherein the fourth bitstream further comprises a sixth field, and the sixth field comprises the state information.
6 . The method according to claim 5 , further comprising: sending service data to a peer device through the retimer based on determining, based on the state information, that the retimer has not entered the low latency path or has exited the low latency path.
7 . The method according to claim 4 , wherein the first bitstream further comprises a seventh field, wherein the seventh field comprises duration information, and wherein the duration information indicates a consumed duration for the retimer to enter or exit the low latency path.
8 . The method according to claim 7 , wherein after sending the second bitstream to the retimer, the method further comprises: determining a waiting duration based on the duration information; and sending service data to a peer device through the retimer based on a first quantity of fourth bitstreams being received after the waiting duration following a start moment.
9 . The method according to claim 4 , further comprising: sending a fifth bitstream to the retimer, wherein the fifth bitstream comprises an eighth field, wherein the eighth field comprises first enable information, and wherein the first enable information indicates whether the retimer is to enable the low latency path.
10 . The method according to claim 9 , further comprising: receiving a sixth bitstream, wherein the sixth bitstream comprises a ninth field, wherein the ninth field comprises second enable information, and wherein the second enable information indicates whether to enable the low latency path.
11 . The method according to claim 10 , wherein the method further comprises: based on the second enable information being different from the first enable information, updating the first enable information based on the second enable information, to obtain updated first enable information, wherein the updated first enable information is the same as the second enable information; and sending an updated fifth bitstream to the retimer, wherein the updated fifth bitstream comprises an updated first enable field, and the updated first enable field comprises the updated first enable information.
12 . A retimer path control method for wired serial data transmission, wherein the method comprises: receiving, by a path control apparatus, a first bitstream from a first device, wherein the first bitstream comprises a first field; writing, by the path control apparatus, capability information into the first field to obtain a second bitstream, wherein the capability information indicates whether a retimer supports a low latency path, and the low latency path is a path with lowest latency in data transmission paths of the retimer; sending, by the path control apparatus, the second bitstream to a second device; receiving, by the path control apparatus, a third bitstream sent by the second device, wherein the third bitstream comprises a second field, and the second field comprises first enter control information and first exit control information; determining, by the path control apparatus, based on the first enter control information, whether to enter the low latency path; and determining, by the path control apparatus, based on the first exit control information, whether to exit the low latency path; wherein the method further comprises: receiving, by the path control apparatus, a fourth bitstream from the second device, wherein the fourth bitstream comprises a third field; writing, by the path control apparatus, the capability information into the third field to obtain a fifth bitstream; sending, by the path control apparatus, the fifth bitstream to the first device; and receiving, by the path control apparatus, a sixth bitstream sent by the first device, wherein the sixth bitstream comprises a fourth field, and the fourth field comprises second enter control information; wherein determining whether to enter the low latency path is further based on the second enter control information.
13 . The method according to claim 12 , wherein the fourth field further comprises second exit control information; and wherein determining whether to exit the low latency path comprises is further based on the second exit control information.
14 . The method according to claim 12 , wherein the third bitstream further comprises a fifth field, wherein the sixth bitstream further comprises a sixth field, and wherein the method further comprises: writing state information into the fifth field to obtain a seventh bitstream, wherein the state information indicates whether the retimer has entered the low latency path or has exited the low latency path; sending the seventh bitstream to the first device; writing the state information into the sixth field to obtain an eighth bitstream; and sending the eighth bitstream to the second device.
15 . The method according to claim 12 , wherein the first bitstream further comprises a seventh field, and the fourth bitstream further comprises an eighth field; wherein obtaining the second bitstream further comprises: writing duration information into the seventh field, wherein the duration information indicates a consumed duration for the retimer to enter or exit the low latency path; and wherein obtaining the fifth bitstream further comprises: writing the duration information into the eighth field.
16 . The method according to claim 12 , further comprising: receiving a ninth bitstream from the second device, wherein the ninth bitstream comprises a ninth field, and the ninth field comprises first enable information; and determining, based on the first enable information, whether to enable the low latency path.
17 . A path control apparatus for wired serial data transmission, comprising: one or more processors; and a memory, configured to store one or more computer programs or instructions; wherein execution of the one or more computer programs or the instructions by the one or more processors facilitates performance of the following by the path control apparatus: receiving a first bitstream, wherein the first bitstream comprises a first field, wherein the first field comprises capability information of a retimer, and wherein the capability information indicates whether the retimer supports a low latency path; and sending a second bitstream to the retimer, wherein the second bitstream comprises a second field, wherein the second field comprises first enter control information, wherein the first enter control information indicates whether the retimer is to enter the low latency path, and wherein the low latency path is a path with lowest latency in data transmission paths of the retimer; wherein the second bitstream further comprises a fifth field, wherein the fifth field carries state information, and wherein the state information indicates whether the retimer has entered the low latency path or has exited the low latency path.
18 . The path control apparatus according to claim 17 , wherein the second field further comprises first exit control information, and the first exit control information indicates whether the retimer is to exit the low latency path.
19 . The path control apparatus according to claim 17 , wherein execution of the one or more computer programs or the instructions by the one or more processors further facilitates performance of the following by the path control apparatus: sending a third bitstream to the retimer, wherein the third bitstream comprises a third field, and the third field carries the capability information.
20 . The path control apparatus according to claim 17 , wherein execution of the one or more computer programs or the instructions by the one or more processors further facilitates performance of the following by the path control apparatus: receiving a fourth bitstream, wherein the fourth bitstream comprises a fourth field, wherein the fourth field comprises second enter control information and second exit control information, wherein the second enter control information indicates whether the retimer is to enter the low latency path, and wherein the second exit control information indicates whether the retimer is to exit the low latency path.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of International Application No. PCT/CN2022/074361, filed on Jan. 27, 2022, which is hereby incorporated by reference in its entirety. TECHNICAL FIELD This application relates to the field of communication technologies, and in particular, to a retimer path control method, apparatus, and system. BACKGROUND With development of a high-speed serial link technology, an insertion loss (IL) of a communication device is ever-increasing. Excessively large IL may cause a high loss in data transmission and a large link jitter. Currently, a retimer is usually connected between two connected communication devices. The retimer performs a series of processing on received data, to perform relay, amplification, and forwarding on the data and filter out jitter of a communication link. The series of processing performed by the retimer on the received data is usually complex. As a result, data transmission latency exists in the retimer, and data transmission efficiency is affected. Therefore, to reduce the data transmission latency in the retimer, a retimer having a low latency path may be used, so that the retimer forwards the data in the low latency path. For the retimer having the low latency path, the retimer needs to be controlled to enter or exit the low latency path. Therefore, there is an urgent need for an effective retimer path control method. SUMMARY This application provides a retimer path control method, apparatus, and system, to effectively control a retimer path. According to a first aspect, this application provides a retimer path control method for wired serial data transmission. The method includes: receiving a first bitstream, where the first bitstream includes a first field, the first field includes capability information of a retimer, and the capability information indicates whether the retimer supports a low latency path; and sending a second bitstream to the retimer. The second bitstream includes a second field. The second field includes first enter control information. The first enter control information indicates whether the retimer enters the low latency path. The low latency path is a path with lowest latency in data transmission paths of the retimer. In a related technology, before entering the low latency path in a communication link establishment phase, the retimer sends an indication bitstream to two connected communication devices, to indicate the two communication devices to stay in the communication link establishment phase and not to enter a service data transmission phase. Then the retimer independently enters the low latency path. After a communication link is established, the retimer forwards data through the low latency path. Peripheral Component Interconnect Express (PCIe)-based wired serial data transmission is used as an example, and the indication bitstream may be a non-PCIe bitstream. However, in the related technology, some communication devices may become abnormal after receiving the indication bitstream sent by the retimer, and affects a communication process. In the retimer path control method for wired serial data transmission provided in this embodiment of this application, a device may determine, based on the first bitstream, whether the retimer supports the low latency path, and then control the path of the retimer based on the second bitstream, so that the retimer can determine, based on the second bitstream, whether to enter the low latency path. In this case, the retimer may not independently enter the low latency path, thereby effectively controlling the path of the retimer, and the retimer may not send the indication bitstream to the communication device, thereby preventing the device from becoming abnormal caused by the indication bitstream. Optionally, the first bitstream and the second bitstream each may be a training set block (TSB). The bitstream is obtained by adding a field to an existing TSB without changing a format of the existing TSB. In this way, the method can be applied to a high-speed input/output (I/O) protocol. An apparatus to which the method is applied can be directly expanded to a high-speed serial interface, for example, can be expanded to a high-speed serial computer expansion bus standard (PCIe) interface and an Ethernet interface, to implement native interconnection with the retimer, and effectively control paths of retimers having different types of low latency paths. The method is widely applicable without affecting other functions and features of the retimers. In addition, the TSB does not cause abnormality of the first device or second device. In the following second embodiment, the first bitstream is equivalent to a sixth bitstream, the first field is equivalent to a second capability field, the second bitstream is equivalent to a ninth bitstream or a fifteenth bitstream, and the second field is equivalent to a first path control field. In the following third embodimen