US-12626044-B1 - Creating netlists from distributed interactive applications
Abstract
Embodiments included herein are directed towards a method for use in an electronic design. The embodiments may include receiving, using at least one processor, at least a portion of an electronic design. The method may further include automatically prompting a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the portion of the electronic design. The method may also include automatically generating the exported die schematic and the netlist generation view.
Inventors
- Arnold Jean Marie Gustave Ginetti
- Xavier Alasseur
Assignees
- CADENCE DESIGN SYSTEMS, INC.
Dates
- Publication Date
- 20260512
- Application Date
- 20220921
Claims (17)
- 1 . A computer-implemented method for use in an electronic design comprising: receiving, using at least one processor, an electronic design; automatically prompting a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the electronic design; automatically generating the exported die schematic and the netlist generation view; and isolating the exported die schematic from at least one package library, wherein isolating prevents analysis deeper than an exported die symbol.
- 2 . The computer-implemented method of claim 1 , further comprising: isolating the exported die schematic from at least one die library.
- 3 . The computer-implemented method of claim 1 , wherein the netlist generation view includes a name of the exported die schematic and the name corresponds to at least one of a library, a cell, and a view.
- 4 . The computer-implemented method of claim 1 , wherein the netlist generation view includes a name of an electrical model library.
- 5 . The computer-implemented method of claim 1 , further comprising: annotating an exported die symbol and a layout associated with at least one of the exported die schematic and the netlist generation view.
- 6 . The computer-implemented method of claim 1 , further comprising: generating a plurality of integrated circuit netlists in parallel based upon, at least in part, the netlist generation view that was automatically generated.
- 7 . The computer-implemented method of claim 6 , further comprising: automatically stitching at least one of the plurality of integrated circuit netlists with a package netlist.
- 8 . The computer-implemented method of claim 6 , wherein the generating of the plurality of the integrated circuit netlists is based upon, at least in part, a plurality of distributed interactive applications.
- 9 . A system comprising a computing device having at least one processor and a memory, wherein the at least one processor is configured to: receive, using at least one processor, an electronic design; prompt a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the electronic design; generate the exported die schematic and the netlist generation view; and isolate the exported die schematic from at least one package library, wherein isolating prevents analysis deeper than an exported die symbol.
- 10 . The system of claim 9 , wherein the at least one processor is further configured to: isolate the exported die schematic from at least one die library.
- 11 . The system of claim 9 , wherein the netlist generation view includes a name of the exported die schematic and the name corresponds to at least one of a library, a cell, and a view.
- 12 . The system of claim 9 , wherein the netlist generation view includes a name of an electrical model library.
- 13 . The system of claim 9 , wherein the at least one processor is further configured to: annotate an exported die symbol and a layout associated with at least one of the exported die schematic and the netlist generation view.
- 14 . The system of claim 9 , wherein the at least one processor is further configured to: generate a plurality of integrated circuit netlists in parallel based upon, at least in part, the netlist generation view that was generated.
- 15 . The system of claim 14 , wherein the at least one processor is further configured to: stitch at least one of the plurality of integrated circuit netlists with a package netlist.
- 16 . The system of claim 14 , wherein the generating of the a plurality of the integrated circuit netlists is based upon, at least in part, a plurality of distributed interactive applications.
- 17 . A non-transitory computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following operations: receiving, using at least one processor, an electronic design; prompting a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the electronic design; and generating the exported die schematic and the netlist generation view; and isolating the exported die schematic from at least one package library, wherein isolating prevents analysis deeper than an exported die symbol.
Description
FIELD OF THE INVENTION The present disclosure relates to electronic circuit design, and more particularly, to distributed interactive applications for electronic circuit design. BACKGROUND An electronic design application (EDA) may provide various features and functionality including, but not limited to, libraries, process design kits (PDK), and scripting language capability. For example, the electronic design application may allow for creation of design libraries and technology libraries, among other features. Challenges may arise for designers while using the electronic design application and features provided. For example, various features provided by the electronic design application may not synchronize together conveniently or seamlessly and may require additional tasks to be performed for effective electronic design. This may lead to inefficiency in the electronic design process. SUMMARY In one or more embodiments of the present disclosure, a computer-implemented method for use in an electronic design is provided. The method included herein may include receiving, using at least one processor, at least a portion of an electronic design. The method may further include automatically prompting a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the portion of the electronic design. The method may also include automatically generating the exported die schematic and the netlist generation view. One or more of the following features may be included. The method may include isolating the exported die schematic from at least one package library. The method may further include isolating the exported die schematic from at least one die library. The netlist generation view may include a name of the exported die schematic and the name may correspond to at least one of a library, a cell, and a view. The netlist generation view may include a name of an electrical model library. The method may also include annotating an exported die symbol and a layout associated with at least one of the exported die schematic and the netlist generation view. The method may additionally include generating a plurality of integrated circuit netlists in parallel based upon, at least in part, the netlist generation view that was automatically generated. Furthermore, the method may include automatically stitching at least one of the plurality of integrated circuit netlists with a package netlist. The generating of the plurality of the integrated circuit netlists may be based upon, at least in part, a plurality of distributed interactive applications. In one or more embodiments of the present disclosure, a system is provided. The system may include a computing device having at least one processor and a memory. The at least one processor may be configured to receive, using at least one processor, at least a portion of an electronic design. The at least one processor may be further configured to prompt a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the portion of the electronic design. The at least one processor may also be configured to access a configuration file and a message server. The at least one processor may additionally be configured to generate the exported die schematic and the netlist generation view. One or more of the following features may be included. The at least one processor may be configured to isolate the exported die schematic from at least one package library. The at least one processor may be further configured to isolate the exported die schematic from at least one die library. The netlist generation view may include a name of the exported die schematic and the name corresponds to at least one of a library, a cell, and a view. The netlist generation view may include a name of an electrical model library. The at least one processor may also be configured to annotate an exported die symbol and a layout associated with at least one of the exported die schematic and the netlist generation view. The at least one processor may additionally be configured to generate a plurality of integrated circuit netlists in parallel based upon, at least in part, the netlist generation view that was generated. Furthermore, the at least one processor may be configured to stitch at least one of the plurality of integrated circuit netlists with a package netlist. The generating of the a plurality of the integrated circuit netlists may be based upon, at least in part, a plurality of distributed interactive applications In one or more embodiments of the present disclosure, a computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following operations is provided. The operations may include receiving, using at least one processor, at least a portion of an electronic design. The operations may further in