US-12626623-B2 - Chip-on-film package and a display device including the same

US12626623B2US 12626623 B2US12626623 B2US 12626623B2US-12626623-B2

Abstract

A chip-on-film package including: a base film; chip pads including a first signal pad, a second signal pad, first dummy pads, and second dummy pads, wherein the chip pads are connected to a semiconductor chip attached to the base film; and wiring patterns including a first signal pattern connected to the first signal pad, a second signal pattern connected to the second signal pad, a first dummy pattern connected to the first dummy pads, and a second dummy pattern connected to the second dummy pads, wherein the first dummy pads and the second dummy pads are continuously disposed in a first direction, the first dummy pattern is disposed between the first signal pattern and the second dummy pattern, and a distance between the first dummy pattern and the first signal pattern is greater than a distance between the first dummy pattern and the second dummy pattern.

Inventors

KYOUNGSUK YANG
Jinchul Choi

Assignees

SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20231020
Priority Date: 20230213

Claims (19)

1 . A chip-on-film package comprising: a base film attached to a display panel; a plurality of chip pads including a first signal pad, a second signal pad, a plurality of first dummy pads, and a plurality of second dummy pads, wherein the plurality of chip pads is connected to a semiconductor chip attached to the base film; and a plurality of wiring patterns including a first signal pattern connected to the first signal pad, a second signal pattern connected to the second signal pad, a first dummy pattern connected to the plurality of first dummy pads, and a second dummy pattern connected to the plurality of second dummy pads, wherein the plurality of first dummy pads and the plurality of second dummy pads are continuously disposed in a first direction, the first dummy pattern is disposed between the first signal pattern and the second dummy pattern, the first signal pattern is disposed between the first dummy pattern and the second signal pattern, in the first direction, in the first direction, a shortest distance between the first dummy pattern and the first signal pattern is greater than at least one of a shortest distance between the first dummy pattern and the second dummy pattern and a shortest distance between the first signal pattern and the second signal pattern, the first dummy pattern is connected to a first test pad and the second dummy pattern is connected to a second test pad, and the first test pad and the second test pad are separated from the display panel.
2 . The chip-on-film package of claim 1 , wherein the distance between the first dummy pattern and the first signal pattern is two times or more than the distance between the first dummy pattern and the second dummy pattern.
3 . The chip-on-film package of claim 1 , wherein a first end of the first dummy pattern is connected to the plurality of first dummy pads and a second end of the first dummy pattern is connected to the first test pad, and a first end of the second dummy pattern is connected to the plurality of second dummy pads and a second end of the second dummy pattern is connected to the second test pad.
4 . The chip-on-film package of claim 3 , wherein the first test pad and the second test pad are adjacent to each other, and at least one of the plurality of wiring patterns is disposed between the first test pad, the second test pad, and the plurality of chip pads.
5 . The chip-on-film package of claim 3 , wherein a line width of each of the first dummy pattern and the second dummy pattern is greater than a line width of each of the first signal pattern and the second signal pattern.
6 . The chip-on-film package of claim 3 , wherein an area of each of the first test pad and the second test pad is greater than an area of each of the plurality of chip pads.
7 . The chip-on-film package of claim 1 , wherein, in the first direction, the plurality of first dummy pads and the plurality of second dummy pads are sequentially arranged, and the first signal pad and the second signal pad are arranged on one side of the plurality of first dummy pads.
8 . The chip-on-film package of claim 7 , wherein the first signal pad is disposed between the plurality of first dummy pads and the second signal pad.
9 . The chip-on-film package of claim 1 , wherein, in the first direction, the plurality of first dummy pads and the plurality of second dummy pads are sequentially arranged between the first signal pad and the second signal pad.
10 . The chip-on-film package of claim 9 , wherein, in the first direction, the plurality of second dummy pads are arranged between the plurality of first dummy pads and the second signal pad, and the plurality of first dummy pads are arranged between the plurality of second dummy pads and the first signal pad.
11 . The chip-on-film package of claim 1 , wherein the plurality of patterns include a first power pattern to which a first power supply voltage is applied, and a second power pattern to which a second power supply voltage is applied, the plurality of chip pads include a first power pad connected to the first power pattern and a second power pad connected to the second power pattern, and in the first direction, the first power pad is disposed between the first signal pad and the plurality of first dummy pads, and the second power pad is disposed between the second signal pad and the plurality of second dummy pads.
12 . The chip-on-film package of claim 11 , wherein, in the first direction, the plurality of first dummy pads and the plurality of second dummy pads are arranged between the first power pad and the second power pad.
13 . The chip-on-film package of claim 12 , wherein the first power pattern is disposed between the first signal pattern and the first dummy pattern, and the second power pattern is disposed between the second signal pattern and the second dummy pattern.
14 . The chip-on-film package of claim 1 , wherein the plurality of first dummy pads are electrically connected to each other by the first dummy pattern, and the plurality of second dummy pads are electrically connected to each other by the second dummy pattern.
15 . A display device comprising: a display panel on which a plurality of pixels connected to a plurality of gate lines and a plurality of source lines are arranged; and a chip-on-film package including a base film attached to the display panel and a semiconductor chip mounted on the base film, wherein the chip-on-film package includes a plurality of chip pads connected to the semiconductor chip, a plurality of dummy patterns connected to dummy pads among the plurality of chip pads, a plurality of signal patterns connected to signal pads among the plurality of chip pads, and a plurality of test pads connected to the plurality of dummy patterns, and in a first direction at least one of the plurality of dummy patterns is adjacent to one of the plurality of signal patterns and separated therefrom by a first distance, and the first distance is greater than at least one of a second distance between a pair of dummy patterns adjacent to each other while extending in the first direction and a third distance between a pair of signal patterns adjacent to each other while extending in the first direction, wherein the plurality of dummy patterns include a first dummy pattern connected to first dummy pads among the dummy pads and a second dummy pattern connected to second dummy pads among the dummy pads, the chip-on-film package includes a first test pad connected to the first dummy pattern and a second test pad connected to the second dummy pattern, and the first test pad and the second test pad are separated from the display panel.
16 . The display device of claim 15 , wherein, in the semiconductor chip, first dummy pads, among the dummy pads, are connected to a first signal pad, among the signal pads, and second dummy pads, among the dummy pads, are connected to a second signal pad among the signal pads.
17 . The display device of claim 16 , wherein the number of first dummy pads is greater than the number of first signal pads.
18 . The display device of claim 16 , wherein the first test pad and the second test pad are exposed to the outside.
19 . A chip-on-film package comprising: a base film; a first signal pad formed on the base film and connected to a first source line among a plurality of source lines disposed on a display panel through a first signal pattern; a second signal pad formed on the base film and connected to a second source line among the plurality of source lines through a second signal pattern; a first dummy pattern separated from the first signal pattern by a first distance in a first direction, a first end thereof being connected to a first test pad separated from the display panel, and a second end thereof being connected to a first dummy pad; and a second dummy pattern separated from the first dummy pattern by a second distance in the first direction, a first end thereof being connected to a second test pad separated from the display panel, and a second end thereof being connected to a second dummy pads, wherein the first distance is greater than at least one of the second distance and a third distance between a pair of signal patterns adjacent to each other in the first direction.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S) This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2023-0018781 filed on Feb. 13, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. TECHNICAL FIELD The present inventive concept relates to a chip-on-film package and a display device including the same. DISCUSSION OF RELATED ART Display devices include a display panel on which a plurality of pixels are disposed and a driving device for driving the plurality of pixels. The driving device may include at least one semiconductor chip. Semiconductor chips, which output signals to drive the pixels, may be mounted on a chip-on-film package and connected to a display panel. This package may include a plurality of wiring patterns. Additionally, the chip-on-film package may include at least one dummy pattern to be used in an electrostatic discharge (ESD) test to evaluate the impact of static electricity introduced by various factors. SUMMARY An embodiment of the present inventive concept provides a chip-on-film package where the distance between a dummy pattern, used for electrostatic discharge (ESD) testing, and a signal pattern connected to a display panel and used to transmit signals to a plurality of pixels is sufficiently secured. This design strengthens resistance to static electricity. Additionally, there is provided a display device including the same. According to an embodiment of the present inventive concept, there is provided a chip-on-film package including: a base film; a plurality of chip pads including a first signal pad, a second signal pad, a plurality of first dummy pads, and a plurality of second dummy pads, wherein the plurality of chip pads is connected to a semiconductor chip attached to the base film; and a plurality of wiring patterns including a first signal pattern connected to the first signal pad, a second signal pattern connected to the second signal pad, a first dummy pattern connected to the plurality of first dummy pads, and a second dummy pattern connected to the plurality of second dummy pads, wherein the plurality of first dummy pads and the plurality of second dummy pads are continuously disposed in a first direction, the first dummy pattern is disposed between the first signal pattern and the second dummy pattern, and a distance between the first dummy pattern and the first signal pattern is greater than a distance between the first dummy pattern and the second dummy pattern. According to an embodiment of the present inventive concept, there is provided a display device including: a display panel on which a plurality of pixels connected to a plurality of gate lines and a plurality of source lines are arranged; and a chip-on-film package including a base film attached to the display panel and a semiconductor chip mounted on the base film, wherein the chip-on-film package includes a plurality of chip pads connected to the semiconductor chip, a plurality of dummy patterns connected to dummy pads among the plurality of chip pads, a plurality of signal patterns connected to signal pads among the plurality of chip pads, and a plurality of test pads connected to the plurality of dummy patterns, and in a first direction at least one of the plurality of dummy patterns is adjacent to one of the plurality of signal patterns and separated therefrom by a first distance, and the first distance is greater than at least one of a second distance between a pair of dummy patterns adjacent to each other while extending in the first direction and a third distance between a pair of signal patterns adjacent to each other while extending in the first direction. According to an embodiment of the present inventive concept, there is provided a chip-on-film package including: a base film; a first signal pad formed on the base film and connected to a first source line among a plurality of source lines disposed on a display panel through a first signal pattern; a second signal pad formed on the base film and connected to a second source line among the plurality of source lines through a second signal pattern; a first dummy pattern separated from the first signal pattern by a first distance and connected to a first test pad separated from the display panel; and a second dummy pattern separated from the first dummy pattern by a second distance, smaller than the first distance, and connected to a second test pad separated from the display panel. BRIEF DESCRIPTION OF THE DRAWINGS The above and other features of the present inventive concept will be more clearly understood from the following detailed description, taken in conjunction with the accompanying drawings, in which: FIG. 1 is a schematic diagram illustrating a display device including a chip-on-film package according to an embodiment of the present inventive concept; FIGS. 2 and 3 are diagrams illustrating a partial region of a display device accordin