US-12626660-B2 - Pixel circuit comprising a driving transistor threshold voltage compensation transistor and driving method therefor

US12626660B2US 12626660 B2US12626660 B2US 12626660B2US-12626660-B2

Abstract

The present disclosure discloses a pixel circuit and a driving method therefor, including a data writing unit for controlling the input of data signals; an energy storage unit, the first end thereof is connected with the output end of the data writing unit, and used for storing the data signal output by the data writing unit; a light-emitting unit for luminous display; a first light-emitting control unit, the input end thereof is input a high-level VDD, the control end thereof is input a control signal, and the output end thereof is connected to the first end of the energy storage unit; a driving transistor, a gate thereof is connected to the second end of the energy storage unit, and the input end thereof is connected to the output of the first light-emitting control unit; a second light-emitting control unit; a compensation unit.

Inventors

Lin Sun
Shengfang LIU

Assignees

SEMICONDUCTOR INTEGRATED DISPLAY TECHNOLOGY CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20241104
Priority Date: 20240823

Claims (10)

1 . A pixel circuit, comprising: a data writing unit configured to control input of a data signal; an energy storage unit, a first end of the energy storage unit being connected with an output end of the data writing unit, and the energy storage unit being configured to store the data signal output by the data writing unit; a light-emitting unit configured to emit light for display; a first light-emitting control unit, an input end of the first light-emitting control unit being connected to a high level, a control end of the first light-emitting control unit being input a control signal, and an output end of the first light-emitting control unit being connected to the first end of the energy storage unit; a driving transistor, a gate of the driving transistor being connected to a second end of the energy storage unit, and an input end of the driving transistor being connected to the output end of the first light-emitting control unit; a second light-emitting control unit, a control end of the second light-emitting control unit being input with a light-emitting-enable signal, and an input end of the second light-emitting control unit being connected to an output end of the driving transistor, and an output end of the second light-emitting control unit being configured to provide a light-emitting current to the light-emitting unit; a compensation unit, a first end of the compensation unit being connected to the second end of the energy storage unit, a second end of the compensation unit being connected to the output end of the driving transistor, and a control end of the compensation unit being input with a compensation control signal; wherein the driving transistor is a silicon crystal PMOS transistor; wherein the compensation unit comprises a fourth PMOS transistor, a drain of the fourth PMOS transistor is connected to a second end of the energy storage unit, and a source of the fourth PMOS transistor is connected to the drain of the driving transistor, and a gate of the fourth PMOS transistor is connected to the compensation control signal; wherein a first reset unit comprises a fifth PMOS transistor, a drain of the fifth PMOS transistor is connected to the input end of the light-emitting unit, a gate of the fifth PMOS transistor is input with a reset control signal, and a source of the fifth PMOS transistor is connected to a reset signal; wherein the pixel circuit further comprises a second reset unit; the second reset unit comprises a sixth PMOS transistor, a drain of the sixth PMOS transistor is connected to the second end of the energy storage unit, a gate of the sixth PMOS transistor is input with the reset control signal, and a source of the sixth PMOS transistor is input with the reset signal; or the first reset unit comprises a sixth PMOS transistor, a drain of the sixth PMOS transistor is connected to the output end of the drive transistor, a gate of the sixth PMOS transistor is input with a reset control signal, and a source of the sixth PMOS transistor is input with a reset signal.
2 . The pixel circuit of claim 1 , further comprising: the first reset unit, wherein the first reset unit is connected to an input end of the light-emitting unit and is configured to reset the light-emitting unit.
3 . The pixel circuit of claim 2 , further comprising: the second reset unit, wherein the second reset unit is connected to the second end of the energy storage unit and is configured to reset the energy storage unit.
4 . The pixel circuit of claim 2 , wherein the data writing unit comprises a first P-channel Metal Oxide Semiconductor (PMOS) transistor, and a source of the first PMOS transistor is connected to the data signal.
5 . The pixel circuit of claim 4 , wherein the energy storage unit comprises a capacitor, a first end of the capacitor is connected to a drain of the first PMOS transistor of the data writing unit.
6 . The pixel circuit of claim 5 , wherein the first light-emitting control unit comprises a second PMOS transistor, a source of the second PMOS transistor is connected to the high level, and a gate of the second PMOS transistor is connected to the control signal.
7 . The pixel circuit of claim 6 , wherein the second light-emitting control unit comprises a third PMOS transistor, a source of the third PMOS transistor is connected to a drain of the driving transistor, and a gate of the third PMOS transistor is connected to the light-emitting-enable signal.
8 . A driving method of the pixel circuit of claim 1 , comprising: in an initialization phase, turning on the first reset unit and the second reset unit, turning off the first light-emitting control unit, the data writing unit, the compensation unit and the second light-emitting control unit, to initialize the energy storage unit and the light-emitting unit; in a data writing phase, turning off the first light-emitting control unit, the compensation unit and the second light-emitting control unit, and turning on the data writing unit, the first reset unit and the second reset unit, to write data; in a threshold voltage compensation phase, turning off the first light-emitting control unit, the second light-emitting control unit, the first reset unit and the second reset unit, and turning on the data writing unit and the compensation unit until V data −V g =a*(VDD−V data )+|V th |, wherein a is a substrate bias coefficient, VDD is a gate substrate voltage of the driving transistor, V data is a gray level voltage, V g is a gate voltage of the driving transistor, V th is a native threshold of the driving transistor; in a light-emitting phase, turning on the first light-emitting control unit and the second light-emitting control unit, and turning off the data writing unit, the compensation unit, the first reset unit and the second reset unit, I oled =β*(V sg −|V th |) 2 =β*a 2 *(VDD−V data ) 2 , wherein I oled is a light-emitting current of the light-emitting unit, V sg is a voltage difference between a node S and the node g, β = 0.5 × u × Cox × W L , U is a mobility, Cox is an oxide capacitance, W/L is an aspect ratio of the driving transistor.
9 . A driving method of the pixel circuit of claim 1 , comprising: in an initialization and data writing phase, turning off the first light-emitting control unit and the second light-emitting control unit, turning on the data writing unit, the compensation unit and the first reset unit, to initialize the energy storage unit and write data; in a threshold voltage V th compensation phase, turning off the first light-emitting control unit, the second light-emitting control unit and the first reset unit, turning on the data writing unit and the compensation unit, to write the data until V data −V g =a*(VDD−V data )+|V th |, wherein a is a substrate bias coefficient, VDD is a gate substrate voltage of the driving transistor, V data is a gray level voltage, V g is a gate voltage of the driving transistor, V th is a native threshold of the driving transistor; in an anode initialization phase, turning off the first light-emitting control unit, the data writing unit and the compensation unit, and turning on the first reset unit and the second light-emitting control unit; in a light-emitting phase, turning off the first reset unit, the data writing unit, and the compensation unit, and turning on the first light-emitting control unit and the second light-emitting control unit, I oled =β*(V sg −|V th |) 2 =β*a 2 *(VDD−V data ) 2 , wherein I oled is a light-emitting current of the light-emitting unit, V sg is a voltage difference between a node S and the node g, β = 0.5 × u × Cox × W L , U is a mobility, Cox is an oxide capacitance, W/L is an aspect ratio of the driving transistor.
10 . A driving method of the pixel circuit of claim 1 , comprising: in an anode initialization stage, turning off the first light-emitting control unit and the data writing unit, and turning on the compensation unit, the second light-emitting control unit and the first reset unit; in a data writing phase, turning off the first light-emitting control unit, the second light-emitting control unit and the compensation unit, turning on the data writing unit and the first reset unit, to write data to the source of the driving transistor; in a threshold voltage V th compensation phase, turning off the first light-emitting control unit, the first reset unit, and the second light-emitting control unit, and turning on the data writing unit and the compensation unit until V data −V g =a*(VDD−V data )+|V th |, wherein a is a substrate bias coefficient, VDD is a gate substrate voltage of the driving transistor, V data is a gray level voltage, V g is a gate voltage of the driving transistor, V th is a native threshold of the driving transistor; in a light-emitting phase, turning off the first reset unit, the data writing unit, and the compensation unit, and turning on the first light-emitting control unit and the second light-emitting control unit, I oled =β*(V sg −|V th |) 2 =β*a 2 *(VDD−V data ) 2 , wherein I oled is a light-emitting current of the light-emitting unit, V sg is a voltage difference between a node S and the node g, β = 0.5 × u × Cox × W L , U is a mobility, Cox is an oxide capacitance, W/L is an aspect ratio of the driving transistor.

Description

TECHNICAL FIELD The disclosure herein relates to a technical field of display, especially to a pixel panel and a driving method therefor. BACKGROUND Organic Light Emitting Diode (OLED) is one of the hot spots in the current flat panel display research field. Compared with liquid crystal displays, the OLED has the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response speed, and has begun to replace the traditional Liquid Crystal Display (LCD) in the field of flat panel displays such as mobile phones, PDAs, and digital cameras. Among them, the design of the drive circuit is the key technology to realize the display function. The drive circuit can generally include a scanning drive circuit, a light-emitting control circuit, a data drive circuit, a pixel circuit, etc., among which the pixel circuit design is the core technical content of OLED display, which has important research significance. With the development of display technology, people's requirements for display effects are getting higher and higher. However, due to the difference in the physical structure and electrical characteristics of semiconductor devices between different pixels, there is a threshold difference in the driving transistors in semiconductor devices, and the problem becomes more and more obvious as the size of the display panel increases, resulting in uneven display. SUMMARY In order to solve the problems existing in the prior art, the invention provides a pixel circuit and a driving method therefor. The present disclosure provides a pixel circuit, including: a data writing unit configured to control input of a data signal;an energy storage unit, a first end of the energy storage unit being connected with an output end of the data writing unit, and the energy storage unit being configured to storage the data signal output by the data writing unit;a light-emitting unit configured to emit light for display;a first light-emitting control unit, an input end of the first light-emitting control unit being input a high-level VDD, a control end of the first light-emitting control unit being input a control signal, and an output end of the first light-emitting control unit being connected to the first end of the energy storage unit;a driving transistor, a gate of the driving transistor being connected to a second end of the energy storage unit, and an input end of the driving transistor being connected to the output of the first light-emitting control unit;a second light-emitting control unit, a control end of the second light-emitting control unit being input a light-emitting-enable signal, and an input end being connected to the output end of the driving transistor, and an output end being configured to provide a light-emitting current to the light-emitting unit;a compensation unit, a first end of the compensation unit being connected to the second end of the energy storage unit, a second end of being connected to the output end of the driving transistor, and a control end of the compensation unit being input a compensation control signal. In some embodiments, the pixel circuit further includes: a first reset unit, the first reset unit is connected to an input end of the light-emitting unit and is configured to reset the light-emitting unit. In some embodiments, the pixel circuit, further includes: a second reset unit, the second reset unit is connected to the second end of the energy storage unit and is configured to reset the energy storage unit. In some embodiments, the data writing unit includes a second P-channel Metal Oxide Semiconductor, PMOS transistor, and a source of the second PMOS transistor is input a data signal. In some embodiments, the energy storage unit includes a capacitor, a first end of the energy storage unit is connected to a drain of the second PMOS transistor of the data writing unit. In some embodiments, the first light-emitting control unit includes a first PMOS transistor, a source of the first PMOS transistor is input the high-level VDD, and a gate of the first PMOS transistor is input a control signal. In some embodiments, the driving transistor is a silicon crystal MOS transistor. In some embodiments, the second light-emitting control unit includes a fifth PMOS transistor, a source of the fifth PMOS transistor is connected to the drain of the driving transistor, and a gate of the fifth PMOS transistor is input the light-emitting-enable signal. In some embodiments, the driving transistor is a silicon crystal PMOS transistor; the compensation unit includes a fourth PMOS transistor, a drain of the fourth PMOS transistor is connected to a second end of the capacitor, and a source of the fourth PMOS transistor is connected to the drain of the driving transistor, and a gate of the fourth PMOS transistor is input the compensation control signal. In some embodiments, the first reset unit includes a sixth PMOS transistor, a drain of the sixth PMOS transistor