US-12626769-B2 - Method for reading data stored in a flash memory according to a voltage characteristic and memory controller thereof

US12626769B2US 12626769 B2US12626769 B2US 12626769B2US-12626769-B2

Abstract

A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

Inventors

Tsung-Chieh Yang

Assignees

SILICON MOTION, INC.

Dates

Publication Date: 20260512
Application Date: 20231121

Claims (8)

1 . A method for reading data stored in a flash memory, wherein the flash memory comprises a first set of memory cells and a second set of memory cells, and each memory cell corresponds to a particular threshold voltage, and the method comprises: using a first gate voltage to perform a first reading operation, so as to obtain a first codeword of the first set of the memory cells; using a second gate voltage to perform a second read operation, so as to obtain a second codeword of the first set of the memory cells; obtaining a first voltage characteristic of the first set of the memory cells according to the first codeword and the second codeword; using a third gate voltage to perform a third read operation, so as to obtain a third codeword of the second set of the memory cells; obtaining a second voltage characteristic of the second set of the memory cells according to the first codeword, the second codeword and the third codeword; and reading the first set of the flash memory by using the second voltage characteristic; wherein the first set of memory cells comprises at least a part of the second set of the memory cells.
2 . The method as claimed in claim 1 , wherein the first voltage characteristic is different from the second voltage characteristic.
3 . The method as claimed in claim 1 , wherein the step of reading the first set of the flash memory by using the second voltage characteristic further comprises: determining a shifting direction according to the first codeword, the second codeword and the third codeword; and adjusting a control gate voltage according to the shifting direction.
4 . A memory controller for reading data stored in a flash memory, wherein the flash memory comprises a first set of memory cells and a second set of memory cells, and each memory cell corresponds to a particular threshold voltage, and the memory controller comprises: a control logic, using a first gate voltage to perform a first reading operation, so as to obtain a first codeword of the first set of the memory cells, using a second gate voltage to perform a second read operation, so as to obtain a second codeword of the first set of the memory cells, obtaining a first voltage characteristic of the first set of the memory cells according to the first codeword and the second codeword, using a third gate voltage to perform a third read operation, so as to obtain a third codeword of the second set of the memory cells, obtaining a second voltage characteristic of the second set of the memory cells according to the first codeword, the second codeword and the third codeword, and reading the first set of the flash memory by using the second voltage characteristic; wherein the first set of memory cells comprises at least a part of the second set of the memory cells.
5 . The memory controller as claimed in claim 4 , wherein the first voltage characteristic is different from the second voltage characteristic.
6 . The memory controller as claimed in claim 4 , wherein the step of reading the first set of the flash memory by using the second voltage characteristic further comprises: determining a shifting direction according to the first codeword, the second codeword and the third codeword; and adjusting a control gate voltage according to the shifting direction.
7 . A method for reading data stored in a flash memory, wherein the flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage, the method comprising: reading a part of the memory cells of the flash memory by a first control gate voltage; detecting error bits of the memory cells; correcting the error bits of the memory cell by reading the flash memory continuously; using a first gate voltage to perform a first reading operation, so as to obtain a first codeword of a first set of the memory cells; using a second gate voltage to perform a second read operation, so as to obtain a second codeword of the first set of the memory cells; obtaining a first voltage characteristic of the first set of the memory cells according to the first codeword and the second codeword; averaging the first voltage characteristic for obtaining a second voltage characteristic; and reading a part of the flash memory again by using the second voltage characteristic; wherein the first set of memory cells comprises at least a part of a second set of the memory cells.
8 . A system for reading data stored in a flash memory, wherein the flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage, the system comprising: a control logic for reading a part of the memory cells of the flash memory by using a first control gate voltage; a detector for detecting error bits of the memory cells; a corrector for correcting the error bits of the memory cell by reading the flash memory continuously; wherein the control logic further uses a first gate voltage to perform a first reading operation, so as to obtain a first codeword of a first set of the memory cells, uses a second gate voltage to perform a second read operation, so as to obtain a second codeword of the first set of the memory cells, obtains a first voltage characteristic of the first set of the memory cells according to the first codeword and the second codeword, averages the first voltage characteristic for obtaining a second voltage characteristic, and reads a part of the flash memory again by using the second voltage characteristic; and wherein the first set of memory cells comprises at least a part of a second set of the memory cells.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application is a continuation of U.S. Ser. No. 17/302,422, filed on May 3, 2021, which is a continuation of U.S. Ser. No. 16/865,573, filed on May 4, 2020, which is a continuation of U.S. Ser. No. 16/228,007, filed on Dec. 20, 2018, which is a continuation of U.S. Ser. No. 15/852,847, filed on Dec. 22, 2017, which is a continuation of U.S. Ser. No. 15/337,485, filed on Oct. 28, 2016, which is a continuation of U.S. Ser. No. 14/812,434, filed on Jul. 29, 2015, which is a continuation of U.S. Ser. No. 14/171,207, filed on Feb. 3, 2014, which is a continuation of U.S. Ser. No. 13/402,500, filed on Feb. 22, 2012, the specifications of which are incorporated herein by reference. BACKGROUND OF THE INVENTION 1. Field of the Invention The disclosed embodiments of the present invention relate to reading data stored in a flash memory, and more particularly, to a method and memory controller for reading data stored in a flash memory by referring to binary digit distribution characteristics of bit sequences read from memory cells of the flash memory. 2. Description of the Prior Art Flash memory can be electrically erased and programmed for data storage. It is widely used in memory cards, solid-state drives, portable multimedia players, etc. As the flash memory is a non-volatile memory, no power is needed to maintain the information stored in the flash memory. Besides, the flash memory offers fast read access and better shock resistance. These characteristics explain the popularity of the flash memory. The flash memories may be categorized into NOR-type flash memories and NAND-type flash memories. Regarding the NAND flash memory, it has reduced erasing and programming time and requires less chip area per cell, thus allowing greater storage density and lower cost per bit than the NOR flash memory. In general, the flash memory stores data in an array of memory cells made from floating-gate transistors. Each memory cell can store one bit of information or more than one bit of information by adequately controlling the number of electrical charge on its floating gate to configure the threshold voltage required for turning on the memory cell made of a floating-gate transistor. In this way, when one or more predetermined control gate voltages are applied to a control gate of the floating-gate transistor, the conductive status of the floating-gate transistor would indicate the binary digit(s) stored by the floating-gate transistor. However, due to certain factors, the number of electrical charge originally stored on one flash memory cell may be affected/disturbed. For example, the interference presented in the flash memory may be originated from write (program) disturbance, read disturbance, and/or retention disturbance. Taking a NAND flash memory including memory cells each storing more than one bit of information for example, one physical page includes multiple logical pages, and each of the logical pages is read by using one or more control gate voltages. For instance, regarding one flash memory cell which is configured to store three bits of information, the flash memory cell may have one of eight possible states (i.e., electrical charge levels) corresponding to different electrical charge amounts (i.e., different threshold voltages), respectively. However, due to the increase of the program/erase (P/E) count and/or the retention time, the threshold voltage distribution of memory cells in the flash memory may be changed. Thus, using original control gate voltage setting (i.e., threshold voltage setting) to read the stored bits from the memory cell may fail to obtain the correct stored information due to the changed threshold voltage distribution. SUMMARY OF THE INVENTION In accordance with exemplary embodiments of the present invention, a method, memory controller, and system for reading data stored in a flash memory by referring to threshold voltage distribution are proposed to solve the above-mentioned problem. According to an aspect of the present invention, an exemplary method for reading data stored in a flash memory is disclosed. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage The exemplary method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating a memory system according