US-12626772-B2 - Enhanced de-noising for random telegraph noise

Abstract

A storage device including: a non-volatile memory comprising a plurality of memory cells, wherein the plurality of memory cells comprises a target memory cell; and a storage controller: wherein the storage controller is configured to: read the target memory cell at a plurality of target read times to obtain a plurality of target voltages, select a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generate data corresponding to the target memory cell by providing the plurality of target voltages to the threshold model.

Inventors

• Amit Berman
• Jonathan ZEDAKA
• Dori REICHMANN
• Evgeny BLAICHMAN
• Karen MICHAELI
• Neria Uzan

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260512

Application Date

20240604

Claims (20)

1. 1 . A storage device, comprising: a non-volatile memory comprising a plurality of memory cells, wherein the plurality of memory cells comprise a target memory cell; and a storage controller configured to: read the target memory cell at a plurality of target read times to obtain a plurality of target voltages, select a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generate data corresponding to the target memory cell by providing the plurality of target voltages to the threshold model.
2. 2 . The storage device of claim 1 , wherein each target read time from among the plurality of target read times is separated by a delay.
3. 3 . The storage device of claim 1 , wherein to read the target memory cell at the plurality of target read times, the storage controller is further configured to: read the target memory cell at a first target read time from among the plurality of target read times to obtain a first target voltage from among the plurality of target voltages, and after waiting a predetermined amount of time after the first target read time, read the target memory cell at a second target read time from among the plurality of target read times to obtain a second target voltage from among the plurality of target voltages.
4. 4 . The storage device of claim 1 , wherein each threshold model from among the plurality of threshold models is associated with a corresponding weak decision voltage range from among a plurality of weak decision voltage ranges corresponding to the non-volatile memory.
5. 5 . The storage device of claim 4 , wherein to generate the data, the storage controller is further configured to: determine that at least one target voltage from among the plurality of target voltages corresponds to a weak decision voltage range from among the plurality of weak decision voltage ranges; select the threshold model from among the plurality of threshold models based on determining that the threshold model corresponds to the weak decision voltage range; and generate the data by providing the plurality of target voltages to the threshold model.
6. 6 . The storage device of claim 5 , wherein the plurality of memory cells further comprise a first neighboring memory cell adjacent to the target memory cell in an upward pillar direction and a second neighboring memory cell adjacent to the target memory cell in a downward pillar direction, and wherein an input to the threshold model comprises the plurality of target voltages, a first neighboring voltage read from the first neighboring memory cell, a second neighboring voltage read from the second neighboring memory cell, and the weak decision voltage range.
7. 7 . The storage device of claim 6 , wherein the storage controller is further configured to determine a maximum target voltage and a minimum target voltage from among the plurality of target voltages, and wherein the input to the threshold model further comprises the maximum target voltage and the minimum target voltage.
8. 8 . The storage device of claim 6 , wherein the storage controller is further configured to determine a mean target voltage from among the plurality of target voltages, and wherein the input to the threshold model further comprises the mean target voltage.
9. 9 . A storage controller for controlling a storage device, the storage controller comprising: at least one processor configured to: perform a first target read operation on a target memory cell included in a non-volatile memory to obtain a first target voltage, after waiting a predetermined amount of time after the first target read operation, perform a second target read operation on the target memory cell to obtain a second target voltage, select a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generate data corresponding to the target memory cell by providing the first target voltage and the second target voltage to the threshold model.
10. 10 . The storage controller of claim 9 , wherein each threshold model from among the plurality of threshold models is associated with a corresponding weak decision voltage range from among a plurality of weak decision voltage ranges corresponding to the non-volatile memory.
11. 11 . The storage controller of claim 10 , wherein to generate the data, the at least one processor is further configured to: determine that at least one from among the first target voltage and the second target voltage corresponds to a weak decision voltage range from among the plurality of weak decision voltage ranges; select the threshold model from among the plurality of threshold models based on determining that the threshold model corresponds to the weak decision voltage range; and generate the data by providing the first target voltage and the second target voltage to the threshold model.
12. 12 . The storage controller of claim 11 , wherein the non-volatile memory further comprises a first neighboring memory cell adjacent to the target memory cell in an upward pillar direction and a second neighboring memory cell adjacent to the target memory cell in a downward pillar direction, wherein the at least one processor is further configured to: perform a first neighboring read operation on the first neighboring memory cell to obtain a first neighboring voltage, and perform a second neighboring read operation on the second neighboring memory cell to obtain a second neighboring voltage, and wherein an input to the threshold model comprises the first target voltage, the second target voltage, the first neighboring voltage, the second neighboring voltage, and the weak decision voltage range.
13. 13 . The storage controller of claim 12 , wherein the first target read operation and the second target read operation are included in a plurality of target read operations performed by the at least one processor on the target memory cell to obtain a plurality of target voltages, wherein the storage controller is further configured to determine a maximum target voltage and a minimum target voltage from among the plurality of target voltages, and wherein the input to the threshold model further comprises the maximum target voltage and the minimum target voltage.
14. 14 . The storage controller of claim 12 , wherein the first target read operation and the second target read operation are included in a plurality of target read operations performed by the at least one processor on the target memory cell to obtain a plurality of target voltages, wherein the storage controller is further configured to determine a mean target voltage from among the plurality of target voltages, and wherein the input to the threshold model further comprises the mean target voltage.
15. 15 . A method of reading data stored in a storage device, the method being executed by at least one processor and comprising: reading a target memory cell at a plurality of target read times to obtain a plurality of target voltages, wherein the target memory cell is included in a plurality of memory cells included in a non-volatile memory of the storage device; selecting a threshold model corresponding to the target memory cell from among a plurality of threshold models; and generating data corresponding to the target memory cell by providing the plurality of target voltages to the threshold model.
16. 16 . The method of claim 15 , wherein each target read time from among the plurality of target read times is separated by a delay.
17. 17 . The method of claim 15 , wherein the reading of the target memory cell at the plurality of target read times comprises: reading the target memory cell at a first target read time from among the plurality of target read times to obtain a first target voltage from among the plurality of target voltages; and after waiting a predetermined amount of time after the first target read time, reading the target memory cell at a second target read time from among the plurality of target read times to obtain a second target voltage from among the plurality of target voltages.
18. 18 . The method of claim 15 , wherein each threshold model from among the plurality of threshold models is associated with a corresponding weak decision voltage range from among a plurality of weak decision voltage ranges corresponding to the non-volatile memory.
19. 19 . The method of claim 18 , wherein the generating the data comprises: determining that at least one target voltage from among the plurality of target voltages corresponds to a weak decision voltage range from among the plurality of weak decision voltage ranges; selecting the threshold model from among the plurality of threshold models based on determining that the threshold model corresponds to the weak decision voltage range; and generating the data by providing the plurality of target voltages to the threshold model.
20. 20 . The method of claim 19 , wherein the plurality of memory cells further comprises a first neighboring memory cell adjacent to the target memory cell in an upward pillar direction and a second neighboring memory cell adjacent to the target memory cell in a downward pillar direction, and wherein an input to the threshold model comprises the plurality of target voltages, a first neighboring voltage read from the first neighboring memory cell, and a second neighboring voltage read from the second neighboring memory cell, and the weak decision voltage range.

Description

1. FIELD The present disclosure relates to systems, apparatuses, and methods for performing equalization and de-noising in a storage device, and more particularly to systems, apparatuses, and methods for reducing the effects of read noise and specifically, random telegraph noise. 2. DESCRIPTION OF RELATED ART Storage devices such as NAND flash memory devices may allow several bits of data to be stored in each memory cell. A memory cell in which multiple bits of data are stored may be referred to as a multi-level memory cell. A multi-level memory cell may partition a voltage range of the memory cell into several voltage states, and data values written to the memory cell may be extracted based on the memory cell voltage levels. The process of reading the memory cell voltage levels, which may be referred to as threshold voltages, may be impaired by the presence of noise, which may refer to random fluctuations due to multiple physical and electronical mechanisms. Random telegraph noise (RTN), which is an abrupt two-level fluctuation in drain current following trapping and release of a single electron from a channel poly-silicon trap, is one example of noise which may affect reading accuracy of a memory cell. The effect of the RTN may be a bottleneck for NAND flash memory scaling, which also induces read errors and device instabilities. SUMMARY Provided are systems, apparatuses, and methods for performing equalization in a storage device, which are capable of reducing the effects of read noise and random telegraph noise. Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments. In accordance with an aspect of the disclosure, a storage device includes a non-volatile memory comprising a plurality of memory cells, wherein the plurality of memory cells comprises a target memory cell; and a storage controller: wherein the storage controller is configured to: read the target memory cell at a plurality of target read times to obtain a plurality of target voltages, select a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generate data corresponding to the target memory cell by providing the plurality of target voltages to the threshold model. In accordance with an aspect of the disclosure, a storage controller for controlling a storage device includes at least one processor configured to: perform a first target read operation on a target memory cell included in a non-volatile memory to obtain a first target voltage, after waiting a predetermined amount of time after the first target read operation, perform a second target read operation on the target memory cell to obtain a second target voltage, select a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generate data corresponding to the target memory cell by providing the first target voltage and the second target voltage to the threshold model. In accordance with an aspect of the disclosure, a method of reading data stored in a storage device includes: reading a target memory cell at a plurality of target read times to obtain a plurality of target voltages, wherein the target memory cell is included in a plurality of memory cells included in a non-volatile memory of the storage device, selecting a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generating data corresponding to the target memory cell by providing the plurality of target voltages to the threshold model. In accordance with an aspect of the disclosure, a method of controlling a storage device includes: performing a first target read operation on a target memory cell included in a non-volatile memory to obtain a first target voltage, after waiting a predetermined amount of time after the first target read operation, performing a second target read operation on the target memory cell to obtain a second target voltage, selecting a threshold model corresponding to the target memory cell from among a plurality of threshold models, and generating data corresponding to the target memory cell by providing the first target voltage and the second target voltage to the threshold model. BRIEF DESCRIPTION OF DRAWINGS The above and other aspects, features, and advantages of certain embodiments of the present disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: FIG. 1 is a block diagram of a computer system, according to embodiments; FIG. 2 is a block diagram of a host storage system, according to embodiments; FIG. 3 is a block diagram of a memory system, according to embodiments; FIG. 4 is a block diagram of a memory device, according to embodiments. FIG. 5 is a block diagram of a UFS system, according to embodiments. FIGS. 6A to 6C are diagrams of a f