US-12627216-B2 - Driving circuit for switching elements with controllable driving current

Abstract

In one embodiment, electronic circuitry includes a driving circuit that is configured to: supply a driving current to a control terminal of a first switching element; and increase the driving current in accordance with a first time at which a current flowing through a second switching element connected to a first terminal or a second terminal of the first switching element becomes 0.

Inventors

• Shusuke KAWAI

Assignees

• KABUSHIKI KAISHA TOSHIBA
• TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

Dates

Publication Date

20260512

Application Date

20220912

Priority Date

20220318

Claims (18)

1. 1 . An electronic circuitry comprising: a driving circuit configured to: supply a driving current to a control terminal of a first switching element; and increase the driving current in accordance with a first time, the first time being when a current flowing through a second switching element becomes 0, the second switching element being connected to a first terminal or a second terminal of the first switching element, wherein the driving circuit increases the driving current of the first switching element in a first period according to the first time, the first period being before or after the first time, and the first period is determined based on a parasitic capacitance of the first switching element, a parasitic capacitance of the second switching element and a parasitic inductance of wiring that connects the first switching element and the second switching element.
2. 2 . The electronic circuitry according to claim 1 , wherein the driving circuit increases the driving current of the first switching element in a step-like manner in the first period, and a target value of the driving current is determined based on: a drain parasitic capacitance of the first switching element; a gate parasitic capacitance of the first switching element; a transconductance of the first switching element; the parasitic inductance of the wiring that connects the first switching element and the second switching element; and a voltage across the parasitic inductance at the first time.
3. 3 . The electronic circuitry according to claim 1 , wherein the driving circuit reduces the driving current of the first switching element in a second period, the second period being between the first time and a second time, the second time being when a current flowing through the first switching element starts to increase.
4. 4 . The electronic circuitry according to claim 3 , wherein the driving circuit reduces the driving current of the first switching element in a step-like manner in the second period, and a target value of the driving current is a value that causes the voltage across a parasitic inductance of wiring that connects the first switching element and the second switching element at the first time to be reduced by a predetermined percentage in comparison with a case where the driving current is not reduced.
5. 5 . The electronic circuitry according to claim 4 , wherein the driving circuit reduces the driving current of the first switching element in a step-like manner over a plurality of times in the second period.
6. 6 . The electronic circuitry according to claim 4 , wherein the driving circuit increases the driving current of the first switching element in a step-like manner at least once in reducing the driving current in a step-like manner in the second period.
7. 7 . An electronic system, comprising: the electronic circuitry according to claim 1 ; and a control circuit configured to provide waveform information of the driving current to the driving circuit of the electronic circuitry, wherein the driving circuit generates the driving current based on the waveform information.
8. 8 . The electronic system according to claim 7 , wherein the control circuit includes: a detection circuit configured to detect an operating state of the first switching element; a storage device configured to store a plurality of waveform information of the driving current; and a selection circuit configured to select one waveform information of the driving current from the storage device, based on the operating state of the first switching element, the operating state being detected by the detection circuit.
9. 9 . An electronic circuitry, comprising: a driving circuit configured to: supply a driving current to a control terminal of a first switching element; and reduce the driving current of the first switching element in a second period between a first time and a second time, the first time being when a current flowing through a second switching element becomes 0, the second switching element being connected to a first terminal or a second terminal of the first switching element, the second time being when a current flowing through the first switching element starts increasing, wherein the driving circuit reduces the driving current of the first switching element in a step-like manner in the second period, and a target value of the driving current is a value that causes a voltage across a parasitic inductance of wiring at the first time to be reduced by a predetermined percentage in comparison with a case where the driving current is not reduced, the wiring connecting the first switching element and the second switching element.
10. 10 . The electronic circuitry according to claim 9 , wherein the driving circuit reduces the driving current of the first switching element in a step-like manner over a plurality of times in the second period.
11. 11 . The electronic circuitry according to claim 9 , wherein the driving circuit increases the driving current of the first switching element in a step-like manner at least once in reducing the driving current in a step-like manner in the second period.
12. 12 . The electronic circuitry according to claim 9 , wherein the driving circuit reduces the driving current of the first switching element in a ramp-like manner in the second period and sets the driving current to a fixed value at the first time.
13. 13 . The electronic circuitry according to claim 12 , wherein a target value of the driving current is a value that causes a voltage across a parasitic inductance of wiring at the first time to be reduced by a predetermined percentage in comparison with a case where the driving current is not reduced, the wiring connecting the first switching element and the second switching element.
14. 14 . The electronic circuitry according to claim 13 , wherein the driving circuit increases the driving current in a ramp-like manner after the first time and then, sets the driving current to a fixed value.
15. 15 . The electronic circuitry according to claim 12 , wherein the driving circuit reduces the driving current of the first switching element in a ramp-like manner over a plurality of times in the second period.
16. 16 . The electronic circuitry according to claim 12 , wherein the driving circuit increases the driving current of the first switching element in a ramp-like manner at least once in reducing the driving current in a ramp-like manner in the second period.
17. 17 . An electronic system, comprising: the electronic circuitry according to claim 9 ; and a control circuit configured to provide waveform information of the driving current to the driving circuit of the electronic circuitry, wherein the driving circuit generates the driving current based on the waveform information.
18. 18 . The electronic system according to claim 17 , wherein the control circuit includes: a detection circuit configured to detect an operating state of the first switching element; a storage device configured to store a plurality of waveform information of the driving current; and a selection circuit configured to select one waveform information of the driving current from the storage device, based on the operating state of the first switching element, the operating state being detected by the detection circuit.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2022-044591, filed on Mar. 18, 2022, the entire contents of which are incorporated herein by reference. FIELD Embodiments described herein generally relate to electronic circuitry and an electronic system. BACKGROUND In the power electronics field, semiconductor switching elements such as a metal oxide semiconductor field effect transistor (MOSFET) and an insulated gate bipolar transistor (IGBT) are used. A circuit including such a switching element can achieve a reduction of power loss by increasing the speed of switching operation of the element. However, increasing the speed of switching operation of the element causes current ringing during turn-on. Such current ringing not only causes noise but also accelerates degradation of the element. There is a technique for obtaining a driving current waveform that allows to reduce current ringing of a switching element, power loss, and the like by using an optimization method based on a simulated annealing algorithm. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates a configuration of a motor control system according to a first embodiment; FIG. 2 illustrates an internal configuration of a control device; FIG. 3 is an equivalent circuit during a first switching element turns-on; FIG. 4 is a timing chart for describing operation during the first switching element turns-on; FIG. 5 is an equivalent circuit during a resonant loop in FIG. 3 is formed; FIG. 6A is one equivalent circuit obtained by dividing the equivalent circuit in FIG. 5 by using the principle of superposition; FIG. 6B is another equivalent circuit obtained by dividing the equivalent circuit in FIG. 5 by using the principle of superposition; FIG. 7 is a timing chart for describing a first method for reducing or eliminating current ringing; FIG. 8 is a graph for describing the first method for reducing or eliminating current ringing; FIG. 9 is a timing chart for describing a second method for reducing or eliminating current ringing; FIG. 10 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 11 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 12 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 13 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 14 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 15 is a timing chart for describing a modification of the first method for reducing or eliminating current ringing; FIG. 16A is a graph for describing the definition of “step-like”; and FIG. 16B is a graph for describing the definition of “ramp-like”. DETAILED DESCRIPTION Hereinafter, embodiments will be described with reference to attached drawings. The same or corresponding elements are denoted by the same reference numerals in the drawings and detailed description thereof will be omitted appropriately. In general, according to one embodiment, electronic circuitry includes a driving circuit that is configured to: supply a driving current to a control terminal of a first switching element; and increase the driving current in accordance with a first time at which a current flowing through a second switching element connected to a first terminal or a second terminal of the first switching element becomes 0. In addition, according to another embodiment, electronic circuitry includes a driving circuit configured to: supply a driving current to a control terminal of a first switching element; and reduce the driving current of the first switching element in a second period between a first time and a second time, the first time being when a current flowing through a second switching element becomes 0, the second switching element being connected to a first terminal or a second terminal of the first switching element, the second time being when a current flowing through the first switching element starts increasing. First Embodiment FIG. 1 illustrates a configuration of an electronic system 100 according to a first embodiment. The electronic system 100 comprises: a three-phase AC motor 1 that serves as a load; a DC power supply Vdc; switching elements 21 to 26 that constitute a three-phase inverter circuit 20; and driving circuits 10a to 10f that drive the switching elements 21 to 26, respectively. In addition, the electronic system 100 comprises: a control circuit 30 that controls the driving circuits 10a to 10f; and an analog-to-digital (A/D) converter 31. The electronic system 100 is configured to control the operation of the motor 1. The switching element 21 and the switching element 22 are N-channel MOSFETs and each has a dr