US-12627225-B2 - Switched capacitor converter

Abstract

A switched capacitor converter includes an auxiliary circuit and two branches, the auxiliary circuit is connected between the two branches, the auxiliary circuit transfers an electric charge or electric charges on one branch to another branch of the two branches during a dead time when all primary power transistors of the two branches are turned off, so as to realize the primary power transistors are turned on at a zero voltage and reduce a switching loss. Therefore, the switched capacitor converter reduces the switching loss and improves efficiency.

Inventors

• Xing Liang
• Wei Zhao

Assignees

• SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO., LTD.

Dates

Publication Date

20260512

Application Date

20221110

Priority Date

20211112

Claims (20)

1. 1 . A switched capacitor converter, comprising a first branch, a second branch, an auxiliary circuit, N common power transistors and N−1 capacitors, wherein N is an integer greater than or equal to 3; the first branch comprises a first power transistor and a second power transistor, the second branch comprises a third power transistor and a fourth power transistor, a first terminal of the second power transistor and a first terminal of the third power transistor are connected to an output terminal of the switched capacitor converter, a second terminal of the second power transistor is connected to a first terminal of the first power transistor via a first node, a second terminal of the third power transistor is connected to a first terminal of the fourth power transistor via a second node, and a second terminal of the first power transistor and a second terminal of the fourth power transistor are grounded; an input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N common power transistors which are connected in turn, each of the N−1 capacitors is corresponded to two adjacent common power transistors of the N common power transistors and a terminal of the each of the N−1 capacitors is connected between the two adjacent common power transistors thereof, another terminal of one of any two adjacent capacitors of the N−1 capacitors is connected to the first node, and another terminal of another of the two adjacent capacitors is connected to the second node; and both terminals of the auxiliary circuit is connected to the first node and the second node respectively, the first power transistor, the second power transistor, the third power transistor, the fourth power transistor and the N common power transistors are primary power transistors, and the auxiliary circuit is configured to transfer, an electric charge or electric charges on one of the first node and the second node to another of the first node and the second node during a dead time when all the primary power transistors are turned off, so that a voltage difference at both terminals of each of the primary power transistors become zero, then the primary power transistors are turned on under zero voltage; wherein the auxiliary circuit comprises a ninth power transistor, a tenth power transistor, an eleventh power transistor, a twelfth power transistor and an inductor; a first terminal of the ninth power transistor is connected to the first node of the first branch, a second terminal of the ninth power transistor is connected to a first terminal of the inductor and a first terminal of the tenth power transistor, and a second terminal of the tenth power transistor is grounded; and a second terminal of the inductor is connected to a first terminal of the eleventh power transistor and a first terminal of the twelfth power transistor, a second terminal of the eleventh power transistor is grounded, and a second terminal of the twelfth power transistor is connected to the second node of the second branch.
2. 2 . The switched capacitor converter according to claim 1 , wherein the N=4, the N common power transistors comprise a fifth power transistor, a sixth power transistor, a seventh power transistor and an eighth power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor and a third capacitor; a first terminal of the eighth power transistor is the input terminal of the switched capacitor converter, the input terminal is connected to an external input voltage, and a second terminal of the eighth power transistor is connected to a first terminal of the seventh power transistor and a first terminal of the third capacitor; a second terminal of the seventh power transistor is connected to a first terminal of the second capacitor and a first terminal of the sixth power transistor; a second terminal of the sixth power transistor is connected to a first terminal of the first capacitor and a first terminal of the fifth power transistor; a second terminal of the fifth power transistor is connected to the first terminal of the second power transistor and the first terminal of the third power transistor, and the second terminal of the fifth power transistor is also connected to the output terminal of the switched capacitor converter; and a second terminal of the first capacitor and a second terminal of the third capacitor are connected to the first node, a second terminal of the second capacitor is connected to the second node.
3. 3 . The switched capacitor converter according to claim 1 , wherein N is an integer greater than or equal to 5, the N common power transistors comprise a first common power transistor, a second common power transistor, a third common power transistor, . . . , a N−3-th common power transistor, a N−2-th common power transistor, a N−1-th common power transistor and a N-th common power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor, a third capacitor, . . . , and a N−1-th capacitor; the input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N-th common power transistor, the N−1-th common power transistor, the N−2-th common power transistor, the N−3-th common power transistor, . . . , the second common power transistor and the first common power transistor which are connected in turn respectively; and a first terminal of the first capacitor is connected between the first common power transistor and the second common power transistor, a second terminal of the first capacitor is connected to the first node, a first terminal of the second capacitor is connected between the second common power transistor and the third common power transistor, and a second terminal of the second capacitor is connected to the second node, so M capacitors of the N−1 capacitors are connected to the first node, and N−M−1 capacitors of the N−1 capacitors are connected to the second node, wherein M=N/2 when N is an even number, and M=(N−1)/2 when N is an odd number.
4. 4 . The switched capacitor converter according to claim 3 , wherein when N is an even number, the N−1-th capacitor is a 2M−1-th capacitor, a first terminal of the 2M−1-th capacitor is connected between the N-th common power transistor and the N−1-th common power transistor, and second terminals of the first capacitor, the third capacitor, . . . , and the 2M−1-th capacitor are connected to the first node respectively; and when N is an odd number, the N−1-th capacitor is a 2(N−M−1)-th capacitor, a first terminal of the 2(N−M−1)-th capacitor is connected between the N-th common power transistor and the N−1-th common power transistor, and second terminals of the second capacitor, . . . , and the 2(N−M−1)-th capacitor are connected to the second node respectively.
5. 5 . The switched capacitor converter according to claim 1 , wherein a working sequence of the switched capacitor converter comprises four stages as follows: a first stage: the second power transistor, the fourth power transistor, the sixth power transistor, the eighth power transistor, the tenth power transistor and the twelfth power transistor are turned on, and remaining power transistors are turned off; the external input voltage is configured to supply power to a load via the third capacitor, and simultaneously the first capacitor and the second capacitor are connected in series to supply power to the load, and the first capacitor is in a charging state, the second capacitor is in a discharging state, the third capacitor is in the charging state, and a current on the inductor is zero; a second stage: the ninth power transistor and the twelfth power transistor are turned on, and remaining power transistors are turned off, the current on the inductor increases and then decreases until to zero, and the second stage ends when the current on the inductor decreases to zero; a third stage: the first power transistor, the third power transistor, the fifth power transistor, the seventh power transistor, the ninth power transistor and the eleventh power transistor are turned on, and remaining power transistors are turned off; the first capacitor supplies power to the load, the first capacitor is in the discharging state, the second capacitor and the third capacitor are connected in series to supply power to the load, the second capacitor is in the charging state, the third capacitor is in the discharging state, and the current on the inductor is 0; and a fourth stage: the ninth power transistor and the twelfth power transistor are turned on, and remaining power transistors are turned off; the current on the inductor increases and then decreases until to zero, and the fourth stage ends when the current on the inductor decreases to zero, and returning to the first stage.
6. 6 . The switched capacitor converter according to claim 1 , wherein the ninth power transistor, the tenth power transistor, the eleventh power transistor and the twelfth power transistor are N-type power transistors.
7. 7 . The switched capacitor converter according to claim 1 , wherein the ninth power transistor and the twelfth power transistor are P-type power transistors, and the tenth power transistor and the eleventh power transistor are N-type power transistors.
8. 8 . A switched capacitor converter, comprising a first branch, a second branch, an auxiliary circuit, N common power transistors and N−1 capacitors, wherein N is an integer greater than or equal to 3; the first branch comprises a first power transistor and a second power transistor, the second branch comprises a third power transistor and a fourth power transistor, a first terminal of the second power transistor and a first terminal of the third power transistor are connected to an output terminal of the switched capacitor converter, a second terminal of the second power transistor is connected to a first terminal of the first power transistor via a first node, a second terminal of the third power transistor is connected to a first terminal of the fourth power transistor via a second node, and a second terminal of the first power transistor and a second terminal of the fourth power transistor are grounded; an input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N common power transistors which are connected in turn, each of the N−1 capacitors is corresponded to two adjacent common power transistors of the N common power transistors and a terminal of the each of the N−1 capacitors is connected between the two adjacent common power transistors thereof, another terminal of one of any two adjacent capacitors of the N−1 capacitors is connected to the first node, and another terminal of another of the two adjacent capacitors is connected to the second node; and both terminals of the auxiliary circuit is connected to the first node and the second node respectively, the first power transistor, the second power transistor, the third power transistor, the fourth power transistor and the N common power transistors are primary power transistors, and the auxiliary circuit is configured to transfer, an electric charge or electric charges on one of the first node and the second node to another of the first node and the second node during a dead time when all the primary power transistors are turned off, so that a voltage difference at both terminals of each of the primary power transistors become zero, then the primary power transistors are turned on under zero voltage; wherein the auxiliary circuit comprises a ninth power transistor, a tenth power transistor, an eleventh power transistor, a twelfth power transistor and an inductor; a first terminal of the ninth power transistor is connected to the first node of the first branch, a second terminal of the ninth power transistor is connected to a first terminal of the inductor and a first terminal of the tenth power transistor, and a second terminal of the tenth power transistor is grounded; and a second terminal of the inductor is connected to a first terminal of the eleventh power transistor and a first terminal of the twelfth power transistor, a second terminal of the eleventh power transistor is grounded, and a second terminal of the twelfth power transistor is connected to the second node of the second branch.
9. 9 . The switched capacitor converter according to claim 8 , wherein the ninth power transistor, the tenth power transistor, the eleventh power transistor and the twelfth power transistor are N-type power transistors.
10. 10 . The switched capacitor converter according to claim 8 , wherein the ninth power transistor and the twelfth power transistor are P-type power transistors, and the tenth power transistor and the eleventh power transistor are N-type power transistors.
11. 11 . The switched capacitor converter according to claim 8 , wherein the N=4, the N common power transistors comprise a fifth power transistor, a sixth power transistor, a seventh power transistor and an eighth power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor and a third capacitor; a first terminal of the eighth power transistor is the input terminal of the switched capacitor converter, the input terminal is connected to an external input voltage, and a second terminal of the eighth power transistor is connected to a first terminal of the seventh power transistor and a first terminal of the third capacitor; a second terminal of the seventh power transistor is connected to a first terminal of the second capacitor and a first terminal of the sixth power transistor; a second terminal of the sixth power transistor is connected to a first terminal of the first capacitor and a first terminal of the fifth power transistor; a second terminal of the fifth power transistor is connected to the first terminal of the second power transistor and the first terminal of the third power transistor, and the second terminal of the fifth power transistor is also connected to the output terminal of the switched capacitor converter; and a second terminal of the first capacitor and a second terminal of the third capacitor are connected to the first node, a second terminal of the second capacitor is connected to the second node.
12. 12 . The switched capacitor converter according to claim 8 , wherein N is an integer greater than or equal to 5, the N common power transistors comprise a first common power transistor, a second common power transistor, a third common power transistor, . . . , a N−3-th common power transistor, a N−2-th common power transistor, a N−1-th common power transistor and a N-th common power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor, a third capacitor, . . . , and a N−1-th capacitor; the input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N-th common power transistor, the N−1-th common power transistor, the N−2-th common power transistor, the N−3-th common power transistor, . . . , the second common power transistor and the first common power transistor which are connected in turn respectively; and a first terminal of the first capacitor is connected between the first common power transistor and the second common power transistor, a second terminal of the first capacitor is connected to the first node, a first terminal of the second capacitor is connected between the second common power transistor and the third common power transistor, and a second terminal of the second capacitor is connected to the second node, so M capacitors of the N−1 capacitors are connected to the first node, and N−M−1 capacitors of the N−1 capacitors are connected to the second node, wherein M=N/2 when N is an even number, and M=(N−1)/2 when N is an odd number.
13. 13 . A switched capacitor converter, comprising a first branch, a second branch, an auxiliary circuit, N common power transistors and N−1 capacitors, wherein N is an integer greater than or equal to 3; the first branch comprises a first power transistor and a second power transistor, the second branch comprises a third power transistor and a fourth power transistor, a first terminal of the second power transistor and a first terminal of the third power transistor are connected to an output terminal of the switched capacitor converter, a second terminal of the second power transistor is connected to a first terminal of the first power transistor via a first node, a second terminal of the third power transistor is connected to a first terminal of the fourth power transistor via a second node, and a second terminal of the first power transistor and a second terminal of the fourth power transistor are grounded; an input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N common power transistors which are connected in turn, each of the N−1 capacitors is corresponded to two adjacent common power transistors of the N common power transistors and a terminal of the each of the N−1 capacitors is connected between the two adjacent common power transistors thereof, another terminal of one of any two adjacent capacitors of the N−1 capacitors is connected to the first node, and another terminal of another of the two adjacent capacitors is connected to the second node; and both terminals of the auxiliary circuit is connected to the first node and the second node respectively, the first power transistor, the second power transistor, the third power transistor, the fourth power transistor and the N common power transistors are primary power transistors, and the auxiliary circuit is configured to transfer, an electric charge or electric charges on one of the first node and the second node to another of the first node and the second node during a dead time when all the primary power transistors are turned off, so that a voltage difference at both terminals of each of the primary power transistors become zero, then the primary power transistors are turned on under zero voltage; wherein the auxiliary circuit comprises a ninth power transistor, a twelfth power transistor, a first diode, a second diode and an inductor; a first terminal of the ninth power transistor is connected to the first node of the first branch, a second terminal of the ninth power transistor is connected to a first terminal of the first diode and a first terminal of the inductor, a second terminal of the first diode is grounded, the first terminal of the first diode is a cathode, and the second terminal of the first diode is an anode; and a second terminal of the inductor is connected to a first terminal of the second diode and a first terminal of the twelfth power transistor, a second terminal of the second diode is grounded, the first terminal of the second diode is a cathode, the second terminal of the second diode is an anode, and a second terminal of the twelfth power transistor is connected to the second node of the second branch.
14. 14 . The switched capacitor converter according to claim 13 , wherein the ninth power transistor and the twelfth power transistor are N-type power transistors or P-type power transistors.
15. 15 . The switched capacitor converter according to claim 13 , wherein the N=4, the N common power transistors comprise a fifth power transistor, a sixth power transistor, a seventh power transistor and an eighth power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor and a third capacitor; a first terminal of the eighth power transistor is the input terminal of the switched capacitor converter, the input terminal is connected to an external input voltage, and a second terminal of the eighth power transistor is connected to a first terminal of the seventh power transistor and a first terminal of the third capacitor; a second terminal of the seventh power transistor is connected to a first terminal of the second capacitor and a first terminal of the sixth power transistor; a second terminal of the sixth power transistor is connected to a first terminal of the first capacitor and a first terminal of the fifth power transistor; a second terminal of the fifth power transistor is connected to the first terminal of the second power transistor and the first terminal of the third power transistor, and the second terminal of the fifth power transistor is also connected to the output terminal of the switched capacitor converter; and a second terminal of the first capacitor and a second terminal of the third capacitor are connected to the first node, a second terminal of the second capacitor is connected to the second node.
16. 16 . The switched capacitor converter according to claim 13 , wherein N is an integer greater than or equal to 5, the N common power transistors comprise a first common power transistor, a second common power transistor, a third common power transistor, . . . , a N−3-th common power transistor, a N−2-th common power transistor, a N−1-th common power transistor and a N-th common power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor, a third capacitor, . . . , and a N−1-th capacitor.
17. 17 . A switched capacitor converter, comprising a first branch, a second branch, an auxiliary circuit, N common power transistors and N−1 capacitors, wherein N is an integer greater than or equal to 3; the first branch comprises a first power transistor and a second power transistor, the second branch comprises a third power transistor and a fourth power transistor, a first terminal of the second power transistor and a first terminal of the third power transistor are connected to an output terminal of the switched capacitor converter, a second terminal of the second power transistor is connected to a first terminal of the first power transistor via a first node, a second terminal of the third power transistor is connected to a first terminal of the fourth power transistor via a second node, and a second terminal of the first power transistor and a second terminal of the fourth power transistor are grounded; an input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N common power transistors which are connected in turn, each of the N−1 capacitors is corresponded to two adjacent common power transistors of the N common power transistors and a terminal of the each of the N−1 capacitors is connected between the two adjacent common power transistors thereof, another terminal of one of any two adjacent capacitors of the N−1 capacitors is connected to the first node, and another terminal of another of the two adjacent capacitors is connected to the second node; and both terminals of the auxiliary circuit is connected to the first node and the second node respectively, the first power transistor, the second power transistor, the third power transistor, the fourth power transistor and the N common power transistors are primary power transistors, and the auxiliary circuit is configured to transfer, an electric charge or electric charges on one of the first node and the second node to another of the first node and the second node during a dead time when all the primary power transistors are turned off, so that a voltage difference at both terminals of each of the primary power transistors become zero, then the primary power transistors are turned on under zero voltage; wherein the auxiliary circuit comprises a ninth power transistor, a twelfth power transistor and an inductor; a first terminal of the ninth power transistor is connected to the first node of the first branch, and a second terminal of the ninth power transistor is connected to a first terminal of the inductor; and a second terminal of the inductor is connected to a first terminal of the twelfth power transistor, and a second terminal of the twelfth power transistor is connected to the second node of the second branch.
18. 18 . The switched capacitor converter according to claim 17 , wherein the ninth power transistor and the twelfth power transistor are N-type power transistors or P-type power transistors.
19. 19 . The switched capacitor converter according to claim 17 , wherein the N=4, the N common power transistors comprise a fifth power transistor, a sixth power transistor, a seventh power transistor and an eighth power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor and a third capacitor; a first terminal of the eighth power transistor is the input terminal of the switched capacitor converter, the input terminal is connected to an external input voltage, and a second terminal of the eighth power transistor is connected to a first terminal of the seventh power transistor and a first terminal of the third capacitor; a second terminal of the seventh power transistor is connected to a first terminal of the second capacitor and a first terminal of the sixth power transistor; a second terminal of the sixth power transistor is connected to a first terminal of the first capacitor and a first terminal of the fifth power transistor; a second terminal of the fifth power transistor is connected to the first terminal of the second power transistor and the first terminal of the third power transistor, and the second terminal of the fifth power transistor is also connected to the output terminal of the switched capacitor converter; and a second terminal of the first capacitor and a second terminal of the third capacitor are connected to the first node, a second terminal of the second capacitor is connected to the second node.
20. 20 . The switched capacitor converter according to claim 17 , wherein N is an integer greater than or equal to 5, the N common power transistors comprise a first common power transistor, a second common power transistor, a third common power transistor, . . . , a N−3-th common power transistor, a N−2-th common power transistor, a N−1-th common power transistor and a N-th common power transistor, and the N−1 capacitors comprise a first capacitor, a second capacitor, a third capacitor, . . . , and a N−1-th capacitor; the input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N-th common power transistor, the N−1-th common power transistor, the N−2-th common power transistor, the N−3-th common power transistor, . . . , the second common power transistor and the first common power transistor which are connected in turn respectively; and a first terminal of the first capacitor is connected between the first common power transistor and the second common power transistor, a second terminal of the first capacitor is connected to the first node, a first terminal of the second capacitor is connected between the second common power transistor and the third common power transistor, and a second terminal of the second capacitor is connected to the second node, so M capacitors of the N−1 capacitors are connected to the first node, and N−M−1 capacitors of the N−1 capacitors are connected to the second node, wherein M=N/2 when N is an even number, and M=(N−1)/2 when N is an odd number, the input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N-th common power transistor, the N−1-th common power transistor, the N−2-th common power transistor, the N−3-th common power transistor, . . . , the second common power transistor and the first common power transistor which are connected in turn respectively; and a first terminal of the first capacitor is connected between the first common power transistor and the second common power transistor, a second terminal of the first capacitor is connected to the first node, a first terminal of the second capacitor is connected between the second common power transistor and the third common power transistor, and a second terminal of the second capacitor is connected to the second node, so M capacitors of the N−1 capacitors are connected to the first node, and N−M−1 capacitors of the N−1 capacitors are connected to the second node, wherein M=N/2 when N is an even number, and M=(N−1)/2 when N is an odd number.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims the priority benefit of Chinese application serial no. 202111337101.4, filed on Nov. 12, 2021. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification. BACKGROUND Technical Field The present application belongs to the field of switching power supply, and particularly relates to a switched capacitor converter. Description of Related Art Conventional inductive direct current-direct current (DC-DC) converters (for example, buck, boost, buck-boost, etc.) are widely used in 5G base station, server power supply, and mobile phone motherboard to achieve a conversion between different voltages. However, a conversion efficiency of the conventional inductive converter is generally inefficient due to large switching loss and inductive loss. In some applications, such as 5G communication with high power consumption and mobile phones with high power fast charging, the inductive converter requires higher conversion efficiency. Conventional inductive converters do not meet requirements of the conversion efficiency. Since the energy density of capacitors is higher than that of inductors, the conversion efficiency of switched capacitor converters using capacitors for energy transmission is much higher than that of the inductive DC-DC converter, which are widely used in various high efficiency scenarios. And Dickson switched capacitor converters are widely used because of their low equivalent impedance. As shown in FIG. 1, a conventional Dickson 4:1 switched capacitor converter includes eight power transistors (i.e., Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8), three capacitors (i.e., C1, C2 and C3), an input capacitor CIN, an output capacitor COUT and an output load IOUT. The power transistor Q1, power transistor Q3, power transistor Q5 and power transistor Q7 are driven by a same control signal, and power transistor Q2, power transistor Q4, power transistor Q6 and power transistor Q8 are driven by a same control signal. Both control signals are square wave signals with 50% duty ratio, and have a complementary in waveform. The conventional Dickson 4:1 switched capacitor converter can realize that an output voltage VOUT is a quarter of an input voltage, i.e. VIN=4*VOUT. And voltage differences of the three capacitors are VC1=VOUT, VC2=2*VOUT, VC3=3*VOUT, respectively. Although the conventional 4:1 Dickson switched capacitor converter do not have switching-off loss and inductive loss, it still needs to overcome two parasitic capacitors Cds and Cgd when the power transistor is turned on, therefore, there is a certain switching-on loss. For high voltage and low current applications, a ratio of switching-on loss is larger due to higher voltage differences of the two capacitors Cds and Cgd, which limits the further improvement of converter efficiency of the conventional 4:1 Dickson switched capacitor converter. SUMMARY The present application is directed to the above-mentioned problems, and a novel switched capacitor converter with zero voltage switching-on (ZVS) is proposed, all primary power transistors can turn on under the zero voltage by introducing an auxiliary circuit, thereby reducing switching loss. Furthermore, the ZVS switched capacitor converter may be N:1 ZVS switched capacitor converter, N is an integer greater than or equal to 2. An aspect of the present application relates to a switched capacitor converter, including a first branch, a second branch, an auxiliary circuit, N common power transistors and N−1 capacitors, N is an integer greater than or equal to 3. The first branch includes a first power transistor and a second power transistor, the second branch includes a third power transistor and a fourth power transistor, a first terminal of the second power transistor and a first terminal of the third power transistor are connected to an output terminal of the switched capacitor converter, a second terminal of the second power transistor is connected to a first terminal of the first power transistor via a first node, a second terminal of the third power transistor is connected to a first terminal of the fourth power transistor via a second node, and a second terminal of the first power transistor and a second terminal of the fourth power transistor are grounded. An input terminal of the switched capacitor converter is connected to the output terminal of the switched capacitor converter via the N common power transistors which are connected in turn, each of the N−1 capacitors is corresponded to respective two adjacent common power transistors of the N common power transistors and is connected between the two adjacent common power transistors respectively, one of any two adjacent capacitors of the N−1 capacitors is connected to the first node, and another of the two adjacent capacitors is connected to the second node. Both terminals of the auxiliary circuit is connected to the first n