US-12627268-B2 - Power amplifier chip and communication device

Abstract

Example power amplifier chips and communication devices are described. One example power amplifier chip includes a package housing and a plurality of power amplifier dies. The plurality of power amplifier dies are packaged in the package housing, and each of the plurality of power amplifier dies includes at least one stage of power amplifier.

Inventors

• Wei Xu
• Po SHI
• Zhengde Yang
• Yufeng Wang
• Junhao ZOU
• Qingquan LUO
• Shengchang Shangguan

Assignees

• HUAWEI TECHNOLOGIES CO., LTD.

Dates

Publication Date

20260512

Application Date

20230215

Claims (19)

1. 1 . A power amplifier chip, comprising: a package housing, wherein the package housing comprises a packaging material; a plurality of power amplifier dies, wherein: the plurality of power amplifier dies respectively support different radio frequency bands; the plurality of power amplifier dies are configured for supporting dual-connectivity or multi-connectivity; the plurality of power amplifier dies are packaged in the packaging material; and each of the plurality of power amplifier dies comprises at least one stage of power amplifier; and a first switch located in the package housing, wherein the first switch is configured to connect or disconnect a first capacitor between a common ground and a power terminal of a first power amplifier die of the plurality of power amplifier dies, wherein the first power amplifier die comprises the power terminal of the first power amplifier die, and a second power amplifier die of the plurality of power amplifier dies comprises a power terminal of the second power amplifier die.
2. 2 . The power amplifier chip according to claim 1 , wherein the power amplifier chip further comprises: a second capacitor and a second switch that are located in the package housing, wherein the second switch is configured to connect or disconnect the second capacitor between a common ground and the power terminal of the second power amplifier die of the plurality of power amplifier dies.
3. 3 . The power amplifier chip according to claim 1 , wherein the power amplifier chip further comprises: a controller located in the package housing, wherein the controller is configured to: receive, from a radio frequency integrated circuit, indication information indicating a power amplifier configuration; control, based on the indication information, to enable at least one stage of power amplifier in at least one of the plurality of power amplifier dies; and adjust a gain of the at least one stage of power amplifier, wherein the indication information comprises at least one of the following: the at least one stage of power amplifier, a gain of the at least one stage of power amplifier, a power supply mode of the at least one stage of power amplifier, a moment at which the at least one stage of power amplifier is started, a moment at which the gain of the at least one stage of power amplifier is adjusted, or an output port in use of the power amplifier chip.
4. 4 . The power amplifier chip according to claim 1 , wherein the power amplifier chip further comprises: a plurality of switch groups located in the package housing, wherein a first switch group of the plurality of switch groups comprises a first input terminal and a plurality of output terminals; and an output terminal of a third power amplifier die of the plurality of power amplifier dies is connected to a first input terminal of at least one switch group of the plurality of switch groups, and a plurality of output terminals of each of the at least one switch group are connected to at least a subset of a plurality of output ports of the power amplifier chip.
5. 5 . The power amplifier chip according to claim 4 , wherein: a second switch group of the at least one switch group comprises a second input terminal; the second input terminal is connected to a radio frequency signal receive terminal of the power amplifier chip; and a switch in the second switch group connects the radio frequency signal receive terminal to one of a plurality of output terminals in the second switch group based on a control signal.
6. 6 . The power amplifier chip according to claim 1 , wherein a first power amplifier in the at least one stage of power amplifier in each power amplifier die comprises a first gain and a second gain, wherein a first time period between a moment at which the first power amplifier is started and a moment at which the first power amplifier starts to transmit a signal is longer than a second time period between a moment at which the first power amplifier starts to be adjusted from the first gain to the second gain and a moment at which the first power amplifier starts to transmit a signal by using the second gain.
7. 7 . A communication device, wherein the communication device comprises a power supply device and a power amplifier chip, wherein the power amplifier chip comprises: a package housing, wherein the package housing comprises a packaging material; and a plurality of power amplifier dies, wherein: the plurality of power amplifier dies are packaged in the packaging material; each of the plurality of power amplifier dies comprises at least one stage of power amplifier; a first power supply device of the power supply device is configured to supply power to a first power amplifier die in the power amplifier chip; and a second power supply device of the power supply device is configured to supply power to a remaining power amplifier die in the power amplifier chip.
8. 8 . The communication device according to claim 7 , wherein the communication device further comprises: a radio frequency integrated circuit configured to transmit a radio frequency signal to a power amplifier integrated in at least one of the plurality of power amplifier dies.
9. 9 . The communication device according to claim 8 , wherein the power supply device is further configured to: receive an indication signal from the radio frequency integrated circuit; and supply power to the power amplifier based on the indication signal in a power supply mode indicated by the indication signal, wherein the power supply mode comprises an average power tracker mode or an envelope tracker mode.
10. 10 . The communication device according to claim 7 , wherein: the communication device further comprises a first capacitor; and the first capacitor is configured to be connected or disconnected between a common ground and a power terminal of the first power amplifier die based on control of a first switch.
11. 11 . The communication device according to claim 7 , wherein the plurality of power amplifier dies respectively support different radio frequency bands.
12. 12 . The communication device according to claim 7 , wherein the power amplifier chip further comprises: a first switch located in the package housing, wherein the first switch is configured to connect or disconnect a first capacitor between a common ground and a power terminal of a first power amplifier die of the plurality of power amplifier dies.
13. 13 . The communication device according to claim 7 , wherein the power amplifier chip further comprises: a second capacitor and a second switch that are located in the package housing, wherein the second switch is configured to connect or disconnect the second capacitor between a common ground and a power terminal of a second power amplifier die of the plurality of power amplifier dies.
14. 14 . The communication device according to claim 7 , wherein the power amplifier chip further comprises: a controller located in the package housing, wherein the controller is configured to: receive, from a radio frequency integrated circuit, indication information indicating a power amplifier configuration, control, based on the indication information, to enable at least one stage of power amplifier in at least one of the plurality of power amplifier dies; and adjust a gain of the at least one stage of power amplifier, wherein the indication information comprises at least one of the following: the at least one stage of power amplifier, a gain of the at least one stage of power amplifier, a power supply mode of the at least one stage of power amplifier, a moment at which the at least one stage of power amplifier is started, a moment at which the gain of the at least one stage of power amplifier is adjusted, or an output port in use of the power amplifier chip.
15. 15 . The communication device according to claim 7 , wherein the power amplifier chip further comprises: a plurality of switch groups located in the package housing, wherein a first switch group of the plurality of switch groups comprises a first input terminal and a plurality of output terminals; and an output terminal of a third power amplifier die of the plurality of power amplifier dies is connected to a first input terminal of at least one switch group of the plurality of switch groups, and a plurality of output terminals of each of the at least one switch group are connected to at least a subset of a plurality of output ports of the power amplifier chip.
16. 16 . The communication device according to claim 15 , wherein: a second switch group of the at least one switch group comprises a second input terminal; the second input terminal is connected to a radio frequency signal receive terminal of the power amplifier chip; and a switch in the second switch group connects the radio frequency signal receive terminal to one of a plurality of output terminals in the second switch group based on a control signal.
17. 17 . The communication device according to claim 7 , wherein a first power amplifier in the at least one stage of power amplifier in each power amplifier die comprises a first gain and a second gain, wherein a first time period between a moment at which the first power amplifier is started and a moment at which the first power amplifier starts to transmit a signal is longer than a second time period between a moment at which the first power amplifier starts to be adjusted from the first gain to the second gain and a moment at which the first power amplifier starts to transmit a signal by using the second gain.
18. 18 . The power amplifier chip according to claim 1 , wherein a first terminal of the first switch is connected to an electrode of the first capacitor, and a second terminal of the first switch is connected to the common ground.
19. 19 . The communication device according to claim 12 , wherein a first terminal of the first switch is connected to an electrode of the first capacitor, and a second terminal of the first switch is connected to the common ground.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of International Application No. PCT/CN2020/109769, filed on Aug. 18, 2020, the disclosure of which is hereby incorporated by reference in its entirety. TECHNICAL FIELD Embodiments of this application relate to the communication field, and in particular, to a power amplifier chip and a communication device. BACKGROUND With development of science and technologies, communication technologies have been improved rapidly. Wireless communication technologies have undergone long-term evolution and development. In a current wireless communication technology, to increase an information transmission rate, a terminal device usually supports simultaneous access to a 4G network and a 5G network in a dual-connectivity mode. Abase station in the 4G network or the 5G network may perform data transmission with the terminal device by using a 4G frequency band or a 5G frequency band respectively. In a related communication technology, two independent radio frequency units usually need to be disposed in the terminal device, to support data transmission in the 4G network and the 5G network respectively. Each radio frequency unit includes a power amplifier module, a power supply module, and the like. The two independent radio frequency units usually occupy a large layout area of the terminal device. This is not conducive to development of the terminal device toward a small size and a high degree of integration. In another possible dual-connectivity communication scenario, for example, a multi-SIM multi-standby or multi-mode simultaneous transmission scenario, a plurality of independent radio frequency units also cause a similar problem. Therefore, how to reduce a layout area occupied by a radio frequency unit in a terminal device supporting a dual-connectivity data transmission mode becomes an issue that needs to be addressed. SUMMARY This application provides a power amplifier chip and a communication device, to reduce a layout area occupied by a communication device in an electronic device. To achieve the foregoing objective, the following technical solutions are used in this application. According to a first aspect, an embodiment of this application provides a power amplifier chip, including: a package housing; and a plurality of power amplifier dies, where the plurality of power amplifier dies are packaged in the package housing, and each of the plurality of power amplifier dies includes at least one stage of power amplifier. In this embodiment of this application, the plurality of power amplifier dies are packaged in one package housing, so that a layout area occupied by the power amplifier in a terminal device can be reduced, thereby facilitating implementation of a highly integrated terminal device. Based on the first aspect, in a possible implementation, the plurality of power amplifier dies respectively support different radio frequency bands. The different radio frequency bands may include but are not limited to an N41 frequency band (2496 MHz to 2690 MHz), a B39 frequency band (1880 MHz to 1920 MHz), or a B1 frequency band (1920 MHz to 1980 MHz). Based on the first aspect, in a possible implementation, the power amplifier chip further includes: a first switch, located in the package housing, and configured to connect or disconnect a first capacitor between a common ground and a power terminal of a first power amplifier die of the plurality of power amplifier dies. Based on the first aspect, in a possible implementation, the power amplifier chip further includes: a second capacitor and a second switch, located in the package housing, where the second switch is configured to connect or disconnect the second capacitor between the common ground and a power terminal of a second power amplifier die of the plurality of power amplifier dies. Optionally, the second power amplifier die may be the first power amplifier die. Alternatively, the second power amplifier die may be a power amplifier die different from the first power amplifier die. The first switch, the second capacitor, and the second switch are packaged in the power amplifier chip, so that a layout area occupied by a communication device in a terminal device can be further reduced in a scenario in which a power amplifier has a plurality of power supply modes. Based on the first aspect, in a possible implementation, the power amplifier chip further includes: a controller, located in the package housing, where the controller is configured to receive, from a radio frequency integrated circuit, indication information used to indicate a power amplifier configuration, control, based on the indication information, at least one stage of power amplifier in at least one of the plurality of power amplifier dies to be enabled, and adjust a gain of the at least one stage of enabled power amplifier, where the indication information includes at least one of the following: the at least one stage of enabled p