US-12627284-B2 - Techniques for receiver non-linearity calibration

Abstract

Various techniques are described for correcting distortion in an analog input signal after digitization in a receiver signal chain. The techniques include a system that stores concatenated distortion correction terms, allowing for efficient data handling and processing. The techniques further include a system that has a smaller number of replica memories compared to primary memories, which store operational data. The replica memories are updated with new data and may be swapped with primary memories to update them without interrupting system operations. The techniques further include a dither system that uses two memories to store and process the dithered signals, which are then combined to produce a noise-corrected digital output. The techniques further include a system to correct distortions in analog input signals processed through multiple parallel paths.

Inventors

• Carroll C. Speir
• NEVENA RAKULJIC

Assignees

• ANALOG DEVICES, INC.

Dates

Publication Date

20260512

Application Date

20240606

Claims (20)

1. 1 . A system for correcting distortion in an analog input signal, the system comprising: an analog-to-digital converter configured for receiving the analog input signal having the distortion, the analog-to-digital converter configured for generating an N-bit digital signal; and a digital processing circuit configured for receiving the N-bit digital signal, the digital processing circuit including: a memory having a plurality of memory addresses and configured for receiving the N-bit digital signal, wherein at least some of the plurality of memory addresses are configured to store a concatenation of two or more distortion correction terms; wherein the digital processing circuit is configured for: modifying the N-bit digital signal to generate a modified signal; applying the modified signal to the memory, wherein the modified signal represents one of the plurality of memory addresses; outputting, from the memory, an M-bit output representing contents of the memory address specified by the modified signal; modifying the M-bit output to separate the M-bit output into the two or more distortion correction terms; generating, based on the two or more distortion correction terms, a correction digital signal; and applying the correction digital signal to the N-bit digital signal.
2. 2 . The system of claim 1 , wherein modifying the N-bit digital signal includes reducing the number of bits of the N-bit digital signal.
3. 3 . The system of claim 1 , wherein modifying the N-bit digital signal includes applying dither to the N-bit digital signal.
4. 4 . The system of claim 1 , wherein modifying the N-bit digital signal includes applying gain to the N-bit digital signal.
5. 5 . The system of claim 1 , wherein the two or more distortion correction terms have variable bit-width.
6. 6 . The system of claim 1 , wherein the two or more distortion correction terms are time delayed.
7. 7 . The system of claim 1 , wherein the digital processing circuit configured for modifying the N-bit digital signal to generate the modified signal is configured for: applying a scaling factor B to the N-bit digital signal, wherein the two or more distortion correction terms are scaled by 1/B.
8. 8 . The system of claim 1 , wherein the digital processing circuit is configured for: applying a scaling factor to the M-bit output.
9. 9 . The system of claim 1 , wherein the memory has a size of Q×M, and wherein each memory address corresponds to an M-bit word.
10. 10 . A method for correcting distortion in an analog input signal, the method comprising: storing, in a memory having a plurality of memory addresses, a concatenation of two or more distortion correction terms; receiving, based on the analog input signal having the distortion, an N-bit digital signal; modifying the N-bit digital signal to generate a modified signal; applying the modified signal to the memory, wherein the modified signal represents one of the plurality of memory addresses; outputting, from the memory, an M-bit output representing contents of the memory address specified by the modified signal; modifying the M-bit output to separate the M-bit output into the two or more distortion correction terms; generating, based on the two or more distortion correction terms, a correction digital signal; and applying the correction digital signal to the N-bit digital signal.
11. 11 . The method of claim 10 , wherein modifying the N-bit digital signal includes reducing the number of bits of the N-bit digital signal.
12. 12 . The method of claim 10 , wherein modifying the N-bit digital signal includes applying dither to the N-bit digital signal.
13. 13 . The method of claim 10 , wherein modifying the N-bit digital signal includes applying gain to the N-bit digital signal.
14. 14 . The method of claim 10 , wherein the two or more distortion correction terms have variable bit-width.
15. 15 . The method of claim 10 , wherein the two or more distortion correction terms are time delayed.
16. 16 . The method of claim 10 , wherein modifying the N-bit digital signal to generate the modified signal includes: applying a scaling factor B to the N-bit digital signal, wherein the two or more distortion correction terms are scaled by 1/B.
17. 17 . The method of claim 10 , comprising: applying a scaling factor to the M-bit output.
18. 18 . A system for correcting distortion in an analog input signal, the system including an analog-to-digital converter configured for receiving the analog input signal having the distortion, the analog-to-digital converter configured for generating an N-bit digital signal, the system comprising: a digital processing circuit configured for receiving the N-bit digital signal, the digital processing including: a memory having a plurality of memory addresses and configured for receiving the N-bit digital signal; wherein the digital processing circuit is configured for: concatenating two or more distortion correction terms; storing the concatenation of the two or more distortion correction terms in a memory address; modifying the N-bit digital signal to generate a modified signal; applying the modified signal to the memory, wherein the modified signal represents one of the plurality of memory addresses; outputting, from the memory, an M-bit output representing contents of the memory address specified by the modified signal; modifying the M-bit output to separate the M-bit output into the two or more distortion correction terms; generating, based on the two or more distortion correction terms, a correction digital signal; and applying the correction digital signal to the N-bit digital signal.
19. 19 . The system of claim 18 , wherein modifying the N-bit digital signal includes reducing the number of bits of the N-bit digital signal.
20. 20 . The system of claim 18 , wherein modifying the N-bit digital signal includes applying dither to the N-bit digital signal.

Description

FIELD OF THE DISCLOSURE This document pertains generally, but not by way of limitation, to the field of integrated circuits, and in particular to receiver signal chains and digital correction techniques for the receiver signal chains. BACKGROUND Signal chains are fundamental components in a wide array of electronic systems, serving as the backbone for processing analog signals. These chains typically include a series of stages, each designed to perform specific functions such as amplification, filtering, and conversion. The signal chain may begin with an input transducer, like a microphone or sensor, which converts a physical phenomenon into an electrical signal. This signal is then conditioned through various stages to prepare it for analog-to-digital conversion, after which it may be processed by digital signal processing (DSP) hardware and/or software. Nonlinearities in signal chains are deviations from the ideal linear response where the output is not directly proportional to the input. These nonlinearities may manifest in various forms, such as harmonic distortion, intermodulation distortion, and cross-talk, among others. The sources of nonlinearity in signal chains are diverse and may be attributed to the inherent characteristics of electronic components and the interactions between them. The impact of nonlinearities on a signal chain's performance may be significant, particularly in high-precision applications such as instrumentation, communication systems, and audio processing. Nonlinearities may compromise the integrity of the signal, leading to errors in measurement, reduced dynamic range, and a lower signal-to-noise ratio (SNR). As such, understanding and managing these nonlinearities is important for maintaining the fidelity and accuracy of the signal as it passes through the chain. In summary, signal chains including multiple functions are essential for the processing of analog signals in electronic systems, and nonlinearities within these chains pose challenges that may affect the overall systems performance. The ability to effectively manage and mitigate these nonlinearities is vital for ensuring the accurate and reliable operation of a wide range of electronic devices and systems. SUMMARY OF THE DISCLOSURE This disclosure describes various techniques for correcting distortion in an analog input signal after digitization in a receiver signal chain. The techniques include a system that stores concatenated distortion correction terms, allowing for efficient data handling and processing. The techniques further include a system that has a smaller number of replica memories compared to primary memories, which store operational data. The replica memories are updated with new data and may be swapped with primary memories to update them without interrupting system operations. The techniques further include a dither system that uses two memories to store and process the dithered signals, which are then combined to produce a noise-corrected digital output. The techniques further include a system to correct distortions in analog input signals processed through multiple parallel paths. In some aspects, this disclosure is directed to a system for correcting distortion in an analog input signal, the system comprising: an analog-to-digital converter configured for receiving the analog input signal having the distortion, the analog-to-digital converter configured for generating an N-bit digital signal; and a digital processing circuit configured for receiving the N-bit digital signal, the digital processing including: a memory having a plurality of memory addresses and configured for receiving the N-bit digital signal, wherein at least some of the plurality of memory addresses are configured to store a concatenation of two or more distortion correction terms; wherein the digital processing circuit is configured for: modifying the N-bit digital signal to generate a modified signal; applying the modified signal to the memory, wherein the modified signal represents one of the plurality of memory addresses; outputting, from the memory, an M-bit output representing contents of the memory address specified by the modified signal; modifying the M-bit output to separate the M-bit output into the two or more distortion correction terms; generating, based on the two or more distortion correction terms, a correction digital signal; and applying the correction digital signal to the N-bit digital signal. In some aspects, this disclosure is directed to a method for correcting distortion in an analog input signal, the method comprising: storing, in a memory having a plurality of memory addresses, a concatenation of two or more distortion correction terms; receiving, based on the analog input signal having the distortion, an N-bit digital signal; modifying the N-bit digital signal to generate a modified signal; applying the modified signal to the memory, wherein the modified signal represents one of the plurality of memory