US-12627288-B2 - Voltage selector
Abstract
A voltage selector includes a first input terminal for receiving a first input voltage, a second input terminal for receiving a second input voltage, an output terminal, a main select circuit and a reference circuit. The main select circuit includes a select unit for outputting a higher input voltage as an output voltage to the output terminal, and an auxiliary unit for pulling up the output voltage to the first input voltage according to a reference voltage when the first input voltage equals to the second input voltage. The reference circuit pulls up the reference voltage according to a higher one of the first input voltage and the second input voltage, and pulls down the reference voltage when the first input voltage equals to the second input voltage and the output voltage is lower than the first input voltage by a threshold voltage.
Inventors
- Yun-Chung Lee
- Chih-Chun Chen
Assignees
- EMEMORY TECHNOLOGY INC.
Dates
- Publication Date
- 20260512
- Application Date
- 20241220
Claims (20)
- 1 . A voltage selector comprising: a first input terminal configured to receive a first input voltage; a second input terminal configured to receive a second input voltage; an output terminal configured to output an output voltage; a main select circuit comprising: a select unit comprising a first transistor coupled between the first input terminal and the output terminal, and a second transistor coupled between the second input terminal and the output terminal, wherein the first transistor is configured to be turned on when the first input voltage is higher than the second input voltage, and the second transistor is configured to be turned on when the second input voltage is higher than the first input voltage; and an auxiliary unit configured to be controlled by a reference voltage to be activated to conduct at least one of a first electrical path between the first input terminal and the output terminal or a second electrical path between the second input terminal and the output terminal to pull up the output voltage when the first input voltage equals to the second input voltage; and a reference circuit comprising: a pull down unit configured to pull down the reference voltage to activate the auxiliary unit to conduct the first electrical path or the second electrical path when the first input voltage equals to the second input voltage and the output voltage is lower than the first input voltage by a threshold voltage.
- 2 . The voltage selector of claim 1 , wherein: a first transistor comprises a first terminal coupled to the first input terminal, a second terminal coupled to the output terminal, and a control terminal coupled to the second input terminal; a second transistor comprises a first terminal coupled to the second input terminal, a second terminal coupled to the output terminal, and a control terminal coupled to the first input terminal; and the first transistor and the second transistor are P-type transistors.
- 3 . The voltage selector of claim 2 , wherein the auxiliary unit comprises: a third P-type transistor comprising a first terminal coupled to the first input terminal, a second terminal coupled to the output terminal, and a control terminal configured to receive the reference voltage; and a fourth P-type transistor comprising a first terminal coupled to the second input terminal, a second terminal coupled to the output terminal, and a control terminal configured to receive the reference voltage.
- 4 . The voltage selector of claim 3 , wherein body terminals of the first transistor, the second transistor, the third P-type transistor, and the fourth P-type transistor are coupled to the output terminal.
- 5 . The voltage selector of claim 3 , wherein the reference circuit further comprises a pull up unit configured to pull up the reference voltage according to a higher one of the first input voltage and the second input voltage.
- 6 . The voltage selector of claim 5 , wherein the pull up unit comprises: a reference terminal configured to output the reference voltage; a fifth P-type transistor comprising a first terminal coupled to the first input terminal, a second terminal, and a control terminal coupled to the second input terminal; a sixth P-type transistor comprising a first terminal coupled to the second terminal of the fifth P-type transistor, a second terminal coupled to the reference terminal, and a control terminal coupled to the output terminal; a seventh P-type transistor comprising a first terminal coupled to the second input terminal, a second terminal, and a control terminal coupled to the first input terminal; and an eighth P-type transistor comprising a first terminal coupled to the second terminal of the seventh P-type transistor, a second terminal coupled to the reference terminal, and a control terminal coupled to the output terminal.
- 7 . The voltage selector of claim 6 , wherein body terminals of the fifth P-type transistor, the sixth P-type transistor, the seventh P-type transistor, and the eighth P-type transistor are coupled to the reference terminal.
- 8 . The voltage selector of claim 6 , wherein the pull down unit comprises a first current mirror coupled between the first input terminal and a system terminal and configured to be controlled by the output voltage to be activated to conduct a discharging current to pull down the reference voltage.
- 9 . The voltage selector of claim 8 , wherein the first current mirror comprises: a ninth P-type transistor comprising a first terminal coupled to the first input terminal, a second terminal, and a control terminal coupled to the output terminal; a first N-type transistor comprising a first terminal coupled to the second terminal of the ninth P-type transistor, a second terminal coupled to a system terminal, and a control terminal coupled to the first terminal of the first N-type transistor; and a second N-type transistor comprising a first terminal coupled to the reference terminal, a second terminal coupled to the system terminal, and a control terminal coupled to the control terminal of the first N-type transistor.
- 10 . The voltage selector of claim 9 , wherein the pull down unit further comprises a second current mirror comprising: a tenth P-type transistor comprising a first terminal coupled to the second input terminal, a second terminal, and a control terminal coupled to the output terminal; a third N-type transistor comprising a first terminal coupled to the second terminal of the tenth P-type transistor, a second terminal coupled to the system terminal, and a control terminal coupled to the first terminal of the third N-type transistor; and a fourth N-type transistor comprising a first terminal coupled to the reference terminal, a second terminal coupled to the system terminal, and a control terminal coupled to the control terminal of the third N-type transistor.
- 11 . The voltage selector of claim 10 , wherein body terminals of the ninth P-type transistor and the tenth P-type transistor are coupled to the output terminal, and body terminals of the first N-type transistor, the second N-type transistor, the third N-type transistor, and the fourth N-type transistor are coupled to the system terminal.
- 12 . The voltage selector of claim 10 , wherein during a first period when the first input voltage equals to the second input voltage, and the output voltage is lower than the first input voltage by the threshold voltage: the ninth P-type transistor and the tenth P-type transistor are turned on so the first current mirror and the second current mirror are activated, and the reference voltage is pulled down by currents conducted through the second N-type transistor and the fourth N-type transistor.
- 13 . The voltage selector of claim 12 , wherein during a second period following the first period: as the reference voltage is pulled down, the third P-type transistor and the fourth P-type transistor are turned on so as to pull up the output voltage to one of the first input voltage and the second input voltage.
- 14 . The voltage selector of claim 13 , wherein during a third period following the second period: as the output voltage is pulled up, the ninth P-type transistor and the tenth P-type transistor are turned off so the first current mirror and the second current mirror are deactivated, and well junctions diodes of the fifth P-type transistor and the seventh P-type transistor pull up the reference voltage.
- 15 . The voltage selector of claim 10 , wherein during a period when the first input voltage is higher than the second input voltage: the first transistor is turned on so as to pull up the output voltage to the first input voltage, and the second transistor, the third P-type transistor, the fourth P-type transistor, the sixth P-type transistor, the seventh P-type transistor, the eighth P-type transistor, the ninth P-type transistor, and the tenth P-type transistor are turned off.
- 16 . The voltage selector of claim 10 , wherein a driving capability of the first transistor is greater than a driving capability of the third P-type transistor.
- 17 . The voltage selector of claim 10 , wherein a width-to-length ratio of the first transistor is greater than a width-to-length ratio of the third P-type transistor.
- 18 . The voltage selector of claim 10 , wherein junction areas of well junction diodes of the fifth P-type transistor, the sixth P-type transistor, the seventh P-type transistor, and the eighth P-type transistor are greater than that of the second N-type transistor and the fourth N-type transistor.
- 19 . The voltage selector of claim 18 , wherein width-to-length ratios of the fifth P-type transistor, the sixth P-type transistor, the seventh P-type transistor, and the eighth P-type transistor are smaller than width-to-length ratios of the second N-type transistor and the fourth N-type transistor.
- 20 . The voltage selector of claim 10 , wherein width-to-length ratios of the second N-type transistor and the fourth N-type transistor are greater than width-to-length ratios of the first N-type transistor and the third N-type transistor.
Description
CROSS REFERENCE This application claims the benefit of prior-filed U.S. provisional application No. 63/554,164, filed on Feb. 16, 2024, which is incorporated by reference in its entirety. TECHNICAL FIELD The present disclosure relates to a voltage selector, and more particularly, to a voltage selector capable with a feedback-controlled scheme. DISCUSSION OF THE BACKGROUND As the functions of electronic circuits become more and more complicated, the electronic circuits may require different levels of voltages for performing different operations. For example, a non-volatile memory circuit requires a regular system voltage for reading operation, and requires a higher voltage for programming operation. In such case, a voltage selector can be employed to switch between different voltages according to the operation to be performed. The voltage selector is designed to receive input voltages from two different input terminals and output the higher one of the two input voltages. However, in prior art, when the two input voltages are at a same level, the output terminal of the voltage selector would become floating, causing the voltage selector trapped in an unstable status with risk of current leakage. This Discussion of the Background section is provided for background information only. The statements in this Discussion of the Background are not an admission that the subject matter disclosed in this section constitutes prior art to the present disclosure, and no part of this Discussion of the Background section may be used as an admission that any part of this application, including this Discussion of the Background section, constitutes prior art to the present disclosure. SUMMARY One aspect of the present disclosure provides a voltage selector. The voltage selector includes a first input terminal, a second input terminal, an output terminal, a main select circuit, and a reference circuit. The first input terminal receives a first input voltage, and the second input terminal receives a second input voltage. The output terminal outputs an output voltage. The main select circuit includes a select unit and an auxiliary unit. The select unit includes a first transistor coupled between the first input terminal and the output terminal, and a second transistor coupled between the second input terminal and the output terminal. The first transistor is turned on when the first input voltage is higher than the second input voltage, and the second transistor is turned on when the second input voltage is higher than the first input voltage. The auxiliary unit is controlled by a reference voltage to be activated to conduct at least one of a first electrical path between the first input terminal and the output terminal or a second electrical path between the second input terminal and the output terminal to pull up the output voltage when the first input voltage equals to the second input voltage. The reference circuit includes a pull down unit. The pull down unit pulls down the reference voltage when the first input voltage equals to the second input voltage and the output voltage is lower than the first input voltage by a threshold voltage. BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the present disclosure may be derived by referring to the detailed description and claims when considered in connection with the Figures, where like reference numbers refer to similar elements throughout the Figures. FIG. 1 shows a voltage selector 900 according to one comparative embodiment of the present embodiment. FIG. 2 shows a voltage selector 100 according to one embodiment of the present disclosure. FIG. 3 shows a timing diagram of voltages at the input terminals, output terminal, and the reference terminal of the voltage selector in FIG. 1 according to one embodiment of the present disclosure. FIGS. 4 to 8 show the charging and discharging behavior of the voltage selector in different periods according to one embodiment of the present disclosure. DETAILED DESCRIPTION FIG. 1 shows a voltage selector 900 according to one comparative embodiment of the present embodiment. The voltage 900 includes input terminals IN1 and IN2, P-type transistors M1P and M2P, and an output terminal OUT. The P-type transistor MIP includes a first terminal, a second terminal, and a control terminal. The first terminal of the P-type transistor M1P is coupled to the input terminal IN1 for receiving a first input voltage V1, the second terminal of the P-type transistor MIP is coupled to the output terminal OUT, and a control terminal of the P-type transistor M1P is coupled to the input terminal IN2 for receiving a second input voltage V2. The P-type transistor M2P includes a first terminal, a second terminal, and a control terminal. The first terminal of the P-type transistor M2P is coupled to the input terminal IN2 for receiving the second input voltage V2, the second terminal of the P-type transistor M2P is coupled to the output terminal OUT, a