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US-12627319-B2 - Multiplexer

US12627319B2US 12627319 B2US12627319 B2US 12627319B2US-12627319-B2

Abstract

A multiplexer includes a common terminal, first and second input/output terminals, a filter connected between the common terminal and the first input/output terminals and having a pass band including a first frequency band, a filter that is connected between the common terminal and the second input/output terminal and having a pass band including a second frequency band lower than the first frequency band, and an additional circuit including a first end connected to the common terminal and a second end connected to portion of a path connecting the common terminal and the first input/output terminal, the portion excluding the common terminal. The additional circuit includes a resonator including IDT electrodes on a piezoelectric substrate, and the IDT electrode with a widest electrode finger pitch is connected to the common terminal.

Inventors

  • Norihiko Nakahashi

Assignees

  • MURATA MANUFACTURING CO., LTD.

Dates

Publication Date
20260512
Application Date
20240119
Priority Date
20230124

Claims (20)

  1. 1 . A multiplexer comprising: a common terminal; a first input/output terminal; a second input/output terminal; a first filter circuit connected between the common terminal and the first input/output terminal and having a pass band including a first frequency band; a second filter circuit connected between the common terminal and the second input/output terminal and having a pass band including a second frequency band lower than the first frequency band; and an additional circuit including a first end connected to the common terminal and a second end connected to a portion of a path connecting the common terminal and the first input/output terminal, the portion excluding the common terminal; wherein the additional circuit includes a resonator including a plurality of interdigital transducer electrodes on a piezoelectric substrate; and an interdigital transducer electrode of the plurality of interdigital transducer electrodes that has a widest electrode finger pitch is connected to the common terminal.
  2. 2 . The multiplexer according to claim 1 , wherein a smallest value of the electrode finger pitch of the interdigital transducer electrode connected to the common terminal is larger than a smallest value of an electrode finger pitch of an interdigital transducer electrode included in the plurality of interdigital transducer electrodes and excluding the interdigital transducer electrode connected to the common terminal.
  3. 3 . The multiplexer according to claim 1 , wherein at a frequency at which an insertion loss of the additional circuit is minimum, a return loss in a view from the first end to the additional circuit is lower than a return loss in a view from the second end to the additional circuit.
  4. 4 . The multiplexer according to claim 1 , wherein a frequency at which an insertion loss of the additional circuit is minimum is lower than a lower frequency end of the first frequency band.
  5. 5 . The multiplexer according to claim 1 , wherein the first frequency band is an uplink operation band; and the second frequency band is a downlink operation band.
  6. 6 . The multiplexer according to claim 1 , further comprising at least one impedance matching circuit element including an inductor.
  7. 7 . The multiplexer according to claim 1 , further comprising at least two inductors defining impedance matching circuit elements.
  8. 8 . The multiplexer according to claim 1 , further comprising reflectors on both sides of the resonator.
  9. 9 . The multiplexer according to claim 1 , wherein the resonator is a transversal acoustic wave resonator.
  10. 10 . The multiplexer according to claim 1 , wherein the widest electrode finger pitch is about ½ of a wavelength of the resonator.
  11. 11 . The multiplexer according to claim 1 , wherein the resonator is a longitudinally coupled resonator including a plurality of acoustic wave resonators.
  12. 12 . The multiplexer according to claim 1 , wherein the first filter circuit is a ladder acoustic wave filter circuit including a plurality of acoustic wave resonators.
  13. 13 . The multiplexer according to claim 1 , wherein the first filter circuit includes serial arm resonators and parallel arm resonators.
  14. 14 . The multiplexer according to claim 1 , wherein the second filter circuit is a longitudinally coupled resonator including a plurality of acoustic wave resonators.
  15. 15 . The multiplexer according to claim 1 , wherein the second filter circuit includes serial arm resonators and parallel arm resonators.
  16. 16 . The multiplexer according to claim 1 , wherein the piezoelectric substrate includes a high-acoustic-velocity support substrate, a low-acoustic-velocity film, and a piezoelectric film are stacked in this order.
  17. 17 . The multiplexer according to claim 1 , wherein the piezoelectric substrate includes a support substrate, an energy-confinement layer, and a piezoelectric film are stacked in this order.
  18. 18 . The multiplexer according to claim 1 , wherein the first filter circuit includes an inductor and a capacitor.
  19. 19 . The multiplexer according to claim 1 , wherein the second filter circuit is a bulk acoustic wave filter.
  20. 20 . The multiplexer according to claim 1 , wherein the second filter circuit is an LC filter.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application claims the benefit of priority to Japanese Patent Application No. 2023-008582 filed on Jan. 24, 2023. The entire contents of this application are hereby incorporated herein by reference. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexer. 2. Description of the Related Art Japanese Unexamined Patent Application Publication No. 2018-74539 discloses the circuit configuration of a multiplexer including a transmission-side filter (first filter) using a first frequency band as a pass band and a reception-side filter (second filter) using a second frequency band as a pass band. An additional circuit including a resonator including a plurality of IDT electrodes is connected to an input/output terminal of the first filter. The connection of the additional circuit enables an attenuation characteristic in a predetermined frequency band for the first filter to be improved. SUMMARY OF THE INVENTION However, the multiplexer described in Japanese Unexamined Patent Application Publication No. 2018-74539 has an issue of bandpass characteristic deterioration in the second filter due to a design parameter for the plurality of IDT electrodes included in the additional circuit. Example embodiments of the present invention provide multiplexers that each achieve an improved bandpass characteristic. According to an aspect of an example embodiment of the present invention, a multiplexer includes a common terminal, a first input/output terminal, a second input/output terminal, a first filter circuit connected between the common terminal and the first input/output terminal and having a pass band including a first frequency band, a second filter circuit connected between the common terminal and the second input/output terminal and having a pass band including a second frequency band lower than the first frequency band, and an additional circuit including a first end connected to the common terminal and a second end connected to a portion of a path connecting the common terminal and the first input/output terminal, the portion excluding the common terminal. The additional circuit includes a resonator including a plurality of interdigital transducer electrodes on a piezoelectric substrate. An interdigital transducer electrode of the plurality of interdigital transducer electrodes that has a widest electrode finger pitch is connected to the common terminal. According to example embodiments of the present invention, multiplexers each having an improved bandpass characteristic are provided. The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the example embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a view of a circuit configuration of a multiplexer according to an example embodiment of the present invention and a peripheral circuit of the multiplexer. FIG. 2A is a view of a circuit configuration of a first filter circuit according to an example embodiment of the present invention. FIG. 2B is a view of a circuit configuration of a second filter circuit according to an example embodiment of the present invention. FIG. 3A illustrates a plan view and a cross-sectional view schematically illustrating a first example of an acoustic wave resonator included in each of filters and an additional circuit according to an example embodiment of the present invention. FIG. 3B is a cross-sectional view schematically illustrating a second example of an acoustic wave resonator included in each of filters and an additional circuit according to an example embodiment of the present invention. FIG. 3C is a cross-sectional view schematically illustrating a third example of an acoustic wave resonator included in each filter according to an example embodiment of the present invention. FIG. 4A is a graph illustrating bandpass characteristics of an additional circuit according to an example embodiment of the present invention. FIG. 4B is a graph illustrating a reflection characteristic in a view from a node N1 to an additional circuit according to an example embodiment of the present invention. FIG. 4C is a graph illustrating a reflection characteristic in a view from a node N2 to an additional circuit according to an example embodiment of the present invention. FIG. 5A is a graph illustrating a bandpass characteristic of a first filter circuit and an additional circuit according to an example embodiment of the present invention and a bandpass characteristic of a first filter circuit and an additional circuit according to a comparative example. FIG. 5B is a graph illustrating respective bandpass characteristics of second filter circuits according to an example embodiment of the present invention and a comparative example. FIG. 50 is a graph illustrating an isolation characteristic of first and