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US-12627363-B2 - Non-cascading MIMO channel extenders for radar chips

US12627363B2US 12627363 B2US12627363 B2US 12627363B2US-12627363-B2

Abstract

A receive extender in an integrated circuit may include: N phase-adjustment circuits that adjust phases of N receive signals from N receive antennas; and an N:1 demultiplexer that coherently combines the N receive signals into an output signal, which is provided to the transceiver chip. Moreover, a transmit extender in the integrated circuit may include: a 1:M multiplexer that coherently separates a transmit signal from the transceiver chip into M transmit signals, where N and M are non-zero integers that may be different; and M phase-adjustment circuits that adjust phases of the M transmit signals, which are provided to M transmit antennas. Note that the integrated circuit may be coupled to a second integrated circuit that phase shifts the output signal and the transmit signal based at least in part on the oscillator signal. Moreover, control signals between the integrated circuit and the second integrated circuit may be synchronized.

Inventors

  • Danny Elad
  • Dan Corcos

Assignees

  • AyDeeKay LLC

Dates

Publication Date
20260512
Application Date
20230307

Claims (20)

  1. 1 . An integrated circuit, comprising: a receive extender; and a transmit extender, wherein the receive extender comprises: N receive contacts configured to couple to N receive antennas and configured to receive N receive signals associated with the N receive antennas, wherein N is a non-zero integer; N phase-adjustment circuits, coupled to the N receive contacts, configured to adjust phases of the N receive signals; an N:1 demultiplexer, coupled to the N phase-adjustment circuits, configured to combine the N receive signals into an output signal; and an output contact, coupled to the N:1 demultiplexer, configured to provide the output signal to a second integrated circuit; and wherein the transmit extender comprises: an input contact configured to receive a transmit signal associated with the second integrated circuit, wherein the second integrated circuit is configured to perform phase shifting of the output signal, the transmit signal, or both, based at least in part on an oscillator signal; a 1:M multiplexer, coupled to the input contact, configured to separate the transmit signal into M transmit signals, wherein M is a non-zero integer; M phase-adjustment circuits, coupled to the 1:M multiplexer, configured to adjust phases of the M transmit signals; and M transmit contacts, coupled to the M phase-adjustment circuits, configured to couple to M transmit antennas and to provide the M transmit signals to the M transmit antennas, wherein control signals for the N phase-adjustment circuits, the M phase-adjustment circuits, or both, are synchronized between the integrated circuit and the second integrated circuit, and the oscillator signal is not synchronized between the integrated circuit and the second integrated circuit.
  2. 2 . The integrated circuit of claim 1 , wherein the N:1 demultiplexer is configured to coherently combine the N receive signals.
  3. 3 . The integrated circuit of claim 1 , wherein the 1:M multiplexer is configured to coherently separate the M transmit signals.
  4. 4 . The integrated circuit of claim 1 , wherein N and M are different.
  5. 5 . The integrated circuit of claim 1 , wherein the N phase-adjustment circuits are configured to apply different phase adjustments to the N receive signals.
  6. 6 . The integrated circuit of claim 1 , wherein the M phase-adjustment circuits are configured to apply different phase adjustments to the M transmit signals.
  7. 7 . The integrated circuit of claim 1 , wherein a configuration of the integrated circuit and the second integrated circuit is different from a cascaded configuration.
  8. 8 . The integrated circuit of claim 1 , wherein the integrated circuit is different from the second integrated circuit.
  9. 9 . The integrated circuit of claim 1 , wherein the second integrated circuit comprises a transceiver chip.
  10. 10 . A system, comprising: an integrated circuit, comprising: a receive extender; and a transmit extender, wherein the receive extender comprises: N receive contacts configured to couple to N receive antennas and configured to receive N receive signals associated with the N receive antennas, wherein Nis a non-zero integer; N phase-adjustment circuits, coupled to the N receive contacts, configured to adjust phases of the N receive signals; an N:1 demultiplexer, coupled to the N phase-adjustment circuits, configured to combine the N receive signals into an output signal; and an output contact, coupled to the N:1 demultiplexer, configured to provide the output signal to a second integrated circuit; and wherein the transmit extender comprises: an input contact configured to receive a transmit signal associated with the second integrated circuit; a 1:M multiplexer, coupled to the input contact, configured to separate the transmit signal into M transmit signals, wherein M is a non-zero integer; M phase-adjustment circuits, coupled to the 1:M multiplexer, configured to adjust phases of the M transmit signals; and M transmit contacts, coupled to the M phase-adjustment circuits, configured to couple to M transmit antennas and to provide the M transmit signals to the M transmit antennas; and the second integrated circuit coupled to the integrated circuit, wherein the second integrated circuit is configured to perform phase shifting of the output signal, the transmit signal, or both, based at least in part on an oscillator signal; and wherein control signals for the N phase-adjustment circuits, the M phase-adjustment circuits, or both, are synchronized between the integrated circuit and the second integrated circuit, and the oscillator signal is not synchronized between the integrated circuit and the second integrated circuit.
  11. 11 . The system of claim 10 , wherein the N:1 demultiplexer is configured to coherently combine the N receive signals.
  12. 12 . The system of claim 10 , wherein the 1:M multiplexer is configured to coherently separate the M transmit signals.
  13. 13 . The system of claim 10 , wherein N and M are different.
  14. 14 . The system of claim 10 , wherein the N phase-adjustment circuits are configured to apply different phase adjustments to the N receive signals.
  15. 15 . The system of claim 10 , wherein the M phase-adjustment circuits are configured to apply different phase adjustments to the M transmit signals.
  16. 16 . The system of claim 10 , wherein a configuration of the integrated circuit and the second integrated circuit is different from a cascaded configuration.
  17. 17 . The system of claim 10 , wherein the integrated circuit is different from the second integrated circuit.
  18. 18 . The system of claim 10 , wherein the second integrated circuit comprises a transceiver chip.
  19. 19 . A method for extending a second integrated circuit, comprising: by a receive extender in an integrated circuit: receiving N receive signals from N receive antennas, wherein N is a non-zero integer; adjusting phases of the N receive signals using N phase-adjustment circuits; combining the N receive signals into an output signal using an N:1 demultiplexer; and providing the output signal to the second integrated circuit; or by a transmit extender in the integrated circuit: receiving a transmit signal associated with the second integrated circuit, wherein the second integrated circuit performs phase shifting of the output signal, the transmit signal, or both, based at least in part on an oscillator signal; separating the transmit signal into M transmit signals using a 1: M multiplexer, wherein Mis a non-zero integer; adjusting phases of the M transmit signals using M phase-adjustment circuits; and providing the M transmit signals to M transmit antennas; synchronizing control signals for the N phase-adjustment circuits, the M phase-adjustment circuits, or both, between the integrated circuit and the second integrated circuit, and not synchronizing the oscillator signal between the integrated circuit and the second integrated circuit.
  20. 20 . The method of claim 19 , wherein the combining of the N receive signals or the separating of the M transmit signals is performed coherently.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application is a continuation-in-part of U.S. Nonprovisional application Ser. No. 17/160,915, entitled “MIMO Channel Extenders with Associated Systems and Methods,” by Danny Elad, et al., filed on Jan. 28, 2021, the contents of which are herein incorporated by reference. The application relates to the following applications: U.S. patent application Ser. No. 16/801,406, filed Feb. 26, 2020, entitled “MIMO Radar with Receive Antenna Multiplexing,” by Danny Elad, et al.; U.S. patent application Ser. No. 16/583,663, filed Sep. 26, 2019, entitled “Multi-Input Downconversion Mixer,” by Benny Sheinman; and U.S. patent application Ser. No. 16/203,149, filed Nov. 28, 2018, entitled “Reconfigurable MIMO Radar,” by Danny Elad, et al., the contents of each of which is hereby incorporated by reference. FIELD The present disclosure relates to techniques for using extender chips to increase the number of transmitters and receivers in multiple-input multiple-output (MIMO) radar systems. BACKGROUND In order to provide improved safety and more-convenient transportation options, many automotive manufacturers are including additional sensors and/or features in their vehicles. For example, self-driving cars typically include a wide variety of sensors, such as acoustic and/or electromagnetic sensors that monitor the surrounding environment to detect other vehicles, people, animals, or obstacles. However, many of the sensors (such as MIMO radar systems), which can include a large number of transmitters and receivers, remain cost prohibitive. SUMMARY The shortcomings identified above may be addressed at least in part by MIMO radar systems with channel extenders to further increase the number of receive and/or transmit antennas that can be supported by a given radar transceiver. One illustrative radar system includes: a radar transceiver to generate a transmit signal and to down convert at least one receive signal; and a receive-side extender that couples to a set of multiple receive antennas to obtain a set of multiple input signals, that adjustably phase-shifts each of the multiple input signals to produce a set of phase-shifted signals, and that couples to the radar transceiver to provide the at least one receive signal, the at least one receive signal being a sum of the phase-shifted signals. An illustrative receive-side extender includes: a set of multiple phase shifters each providing an adjustable phase shift to a respective input signal; a power combiner that forms a receive signal by combining outputs of the multiple phase shifters; and an internal memory that stores, for each of the multiple phase shifters, a different sequence of phase shift adjustments. The receive-side extender may further include an external interface that controls timing for supplying the different sequences from the memory to the multiple phase shifters. An illustrative transmit-side extender includes: a power splitter that splits the respective transmit signal into multiple signal copies; a set of multiple phase shifters each providing an adjustable phase shift for one of the multiple signal copies; a set of power amplifiers each deriving one of the multiple output signals from an output of a corresponding one of the multiple phase shifters; and an internal memory that stores, for each of the multiple phase shifters, a different sequence of phase shift adjustments. The transmit-side extender may further include an external interface that controls timing for supplying the different sequences from the memory to the multiple phase shifters. An illustrative radar detection method includes: generating a chirp waveform; deriving a transmit signal from the chirp waveform; obtaining a set of multiple input signals from a set of multiple receive antennas; applying adjustable phase shifts to each of the multiple input signals to provide multiple phase-shifted input signals; summing the multiple phase-shifted input signals to form a receive signal; combining the receive signal with the chirp waveform to obtain a down-converted receive signal; deriving a set of digital input signals from the down-converted receive signal; and processing the set of digital input signals to determine reflection energy as a function of distance or travel time. The illustrative system, extenders, and method may be employed individually or conjointly, together with one or more of the following optional features in any suitable combination: 1. the transmit signal includes a sequence of chirps. 2. the receive-side extender adjusts the phase shifts for the multiple input signals once for each chirp. 3. the adjusted phase shifts provide progressive phase shifts to the multiple input signals for beam steering. 4. the adjusted phase shifts provide code division multiplexing of the multiple input signals. 5. the radar transceiver processes the at least one down-converted receive signal to obtain a demultiplexed set of digital input signals. 6.