US-12628264-B2 - Flexible printed circuit finger layout for low crosstalk

Abstract

A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.

Inventors

• Masahiro Kishimoto
• John Contreras
• Kazuhiro Nagaoka
• Satoshi Nakamura

Assignees

• WESTERN DIGITAL TECHNOLOGIES, INC.

Dates

Publication Date

20260512

Application Date

20231012

Claims (19)

1. 1 . A flexible printed circuit (FPC) for a hard disk drive, the FPC having a top wiring layer having opposing lateral edges extending longitudinally, a bottom wiring layer having opposing lateral edges extending longitudinally, and a proximal end in the direction of a preamp, the FPC comprising: a plurality of electrical traces comprising: two pairs of aggressor traces, configured to carry signals that can interfere with signals carried by victim traces, grouped together at one lateral edge of the proximal end of either the top wiring layer or the bottom wiring layer; and the victim traces positioned on the same top wiring layer or bottom wiring layer as the aggressor traces; wherein at least one pair of the aggressor traces is routed away from the victim traces, by way of first vias, to the top wiring layer or the bottom wiring layer opposing the layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
2. 2 . The FPC of claim 1 , wherein the at least one pair of the aggressor traces is routed, by way of second vias, back to the top wiring layer or the bottom wiring layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
3. 3 . The FPC of claim 1 , wherein the aggressor traces are positioned adjacently at the one lateral edge of the proximal end.
4. 4 . The FPC of claim 1 , wherein: the aggressor traces are configured to carry write signals; and the victim traces are configured to carry read signals.
5. 5 . The FPC of claim 1 , wherein the aggressor traces are grouped together at the proximal end of the top wiring layer, the FPC further comprising: a ground plane positioned at the proximal end of the bottom wiring layer.
6. 6 . The FPC of claim 1 , wherein the aggressor traces are grouped together at the proximal end of the bottom wiring layer, the FPC further comprising: a ground plane positioned at the proximal end of the top wiring layer.
7. 7 . A hard disk drive comprising the FPC of claim 1 .
8. 8 . A method of manufacturing a flexible printed circuit (FPC) having a top wiring layer having opposing lateral edges extending longitudinally, a bottom wiring layer having opposing lateral edges extending longitudinally, and a proximal end in the direction of a preamp, the method comprising: forming a plurality of electrical traces comprising: forming two pairs of aggressor traces, configured to carry signals that can interfere with signals carried by victim traces, grouped together at one lateral edge of the proximal end of either the top wiring layer or the bottom wiring layer; and forming the victim traces positioned on the same top wiring layer or bottom wiring layer as the aggressor traces; wherein forming the aggressor traces includes routing at least one pair of the aggressor traces away from the victim traces, including forming first vias through which the at least one pair is routed away from the victim traces, to the top wiring layer or the bottom wiring layer opposing the layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
9. 9 . The method of claim 8 , wherein forming the aggressor traces includes routing the at least one pair, including forming second vias through which the at least one pair is routed back to the top wiring layer or the bottom wiring layer at which the aggressor traces are grouped at the one lateral edge of the proximal end.
10. 10 . The method of claim 8 , wherein forming the aggressor traces includes forming the aggressor traces positioned adjacently at the one lateral edge of the proximal end.
11. 11 . The method of claim 8 , wherein: forming the aggressor traces includes configuring the aggressor traces to carry write signals; and forming the victim traces includes configuring the victim traces to carry read signals.
12. 12 . The method of claim 8 , wherein forming the aggressor traces includes grouping the aggressor traces together at the proximal end of the top wiring layer, the method further comprising: forming a ground plane positioned at the proximal end of the bottom wiring layer.
13. 13 . The method of claim 8 , wherein forming the aggressor traces includes grouping the aggressor traces together at the proximal end of the bottom wiring layer, the method further comprising: forming a ground plane positioned at the proximal end of the top wiring layer.
14. 14 . The FPC of claim 1 , wherein the aggressor traces are configured to carry write signals.
15. 15 . The FPC of claim 5 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the bottom wiring layer.
16. 16 . The FPC of claim 6 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the top wiring layer.
17. 17 . The method of claim 8 , wherein forming the aggressor traces includes configuring the aggressor traces to carry write signals.
18. 18 . The method of claim 12 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the bottom wiring layer.
19. 19 . The method of claim 13 , wherein the at least one pair of the aggressor traces is routed away from the victim traces by way of the first vias to the top wiring layer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a divisional of and claims the benefit of priority to U.S. patent application Ser. No. 17/356,155 filed Jun. 23, 2021, the entire content of which is incorporated by reference for all purposes as if fully set forth herein. FIELD OF EMBODIMENTS Embodiments of the invention may relate generally to hard disk drives, and particularly to approaches to avoiding crosstalk noise from aggressor electrical traces to sensor electrical traces in a flexible printed circuit. BACKGROUND A hard disk drive (HDD) is a non-volatile storage device that is housed in a protective enclosure and stores digitally encoded data on one or more circular disks having magnetic surfaces. When an HDD is in operation, each magnetic-recording disk is rapidly rotated by a spindle system. Data is read from and written to a magnetic-recording disk using a read-write head (or “transducer”) that is positioned over a specific location of a disk by an actuator. A read-write head makes use of magnetic fields to write data to and read data from the surface of a magnetic-recording disk. A write head works by using the current flowing through its coil to produce a magnetic field. Electrical pulses are sent to the write head, with different patterns of positive and negative currents. The current in the coil of the write head produces a localized magnetic field across the gap between the head and the magnetic disk, which in turn magnetizes a small area on the recording medium. To write data to the medium, or to read data from the medium, the head has to receive instructions from a controller. Hence, the head is connected to the controller in some electrical manner so that not only does the head receive instructions to read/write data, but the head can also send information back to the controller regarding the data read and/or written. Typically, a flexible printed circuit (FPC) is used to electrically transmit signals from the read-write head via a suspension tail to other electronics within an HDD. The FPC and the suspension tail are typically soldered together at a comb or “E-block” portion (see, e.g., carriage 134 of FIG. 1) of a head-stack assembly (HSA). Unwanted transfer of signals between communication channels, referred to as “crosstalk”, is a well-known electronics phenomenon and is usually caused by undesired capacitance, inductive, or conductive coupling from one channel to another. In an HDD, crosstalk “noise” can occur between aggressor traces and victim traces, often from write signal traces to read signal traces. With crosstalk, the flow of data to/from the head may be compromised, and/or the reliability of the read transducer may be compromised as it is highly sensitive to over-bias voltage stress. Any approaches that may be described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section. BRIEF DESCRIPTION OF THE DRAWINGS Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which: FIG. 1 is a plan view illustrating a hard disk drive, according to an embodiment; FIG. 2A is a perspective view illustrating an actuator assembly, according to an embodiment; FIG. 2B is a perspective view illustrating an integrated lead suspension (ILS) of the actuator assembly of FIG. 2A, according to an embodiment; FIG. 3A is a diagram illustrating mirrored UP and DN read-write heads, according to an embodiment; FIG. 3B is a diagram illustrating flexible printed circuit (FPC) mirrored trace layout for the UP and DN read-write heads of FIG. 3A, according to an embodiment; FIG. 4A is a diagram illustrating common UP and DN read-write heads, according to an embodiment; FIG. 4B is a diagram illustrating FPC trace layout for the common UP and DN read-write heads of FIG. 4A, according to an embodiment; FIG. 5A is a diagram illustrating FPC trace layout for common UP and DN read-write heads, according to an embodiment; FIG. 5B is a cross-section diagram illustrating the FPC trace layout of FIG. 5A, according to an embodiment; FIG. 6A is a diagram illustrating FPC trace layout with tuned impedance for common UP and DN read-write heads, according to an embodiment; FIG. 6B is a cross-section diagram illustrating the FPC trace layout of FIG. 6A, according to an embodiment; FIG. 7A is a diagram illustrating FPC trace layout for common UP and DN read-write heads, according to an embodiment; FIG. 7B is a cross-section diagram illustrating the FPC trace layout of FIG. 7A, according to an embodiment; FIG. 8A is a diagram illustrating FPC trace layout for common UP and DN read-write heads, according to an embodiment; a