US-12628265-B2 - Low permittivity radio frequency substrate, assembly of same, and method of making the same

Abstract

A substrate includes a monolithic structure formed from a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side, and the intermediate region has a lattice structure of the dielectric material having a plurality of interstitial spaces between the dielectric material of the lattice structure. The lattice structure extends between and monolithically connects with the first side and the second side, wherein at least one of the first side and the second side has a substantially solid surface suitably configured to support one or more of electronic circuit imaging, electroplating, metal deposition, or, vias between the first side and the second side.

Inventors

• Trevor Polidore
• Karl Edward Sprentall

Assignees

• ROGERS CORPORATION

Dates

Publication Date

20260512

Application Date

20230628

Claims (20)

1. 1 . A substrate, comprising: a monolithic structure formed from a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side, the intermediate region on and monolithic with the first side, and the second side on and monolithic with the intermediate region; wherein the intermediate region comprises a lattice structure of the dielectric material comprising a plurality of interstitial spaces between the dielectric material of the lattice structure; wherein the lattice structure extends between and monolithically connects with the first side and the second side; wherein at least one of the first side and the second side comprises a substantially solid surface suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or, vias between the first side and the second side, wherein the lattice structure is a surface-based lattice structure and not a strut-based lattice structure.
2. 2 . The substrate of claim 1 , wherein: the interstitial spaces comprise air.
3. 3 . The substrate of claim 1 , wherein: the monolithic structure is not a foam material.
4. 4 . The substrate of claim 1 , wherein: the monolithic structure is not a laminate structure.
5. 5 . The substrate of claim 1 , wherein: both the first side and the second side comprise substantially solid surfaces suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or, vias between the first side and the second side.
6. 6 . The substrate of claim 1 , wherein: the dielectric material of the monolithic structure has a relative dielectric constant equal to or greater than 1.01 and equal to or less than 5.
7. 7 . The substrate of claim 1 , wherein: the monolithic structure is formed relative to an orthogonal x-y-z coordinate system where the z-axis is perpendicular to both the first side and the second side; and the dielectric material comprises ceramic fibers substantially aligned with an x-y plane of the x-y-z coordinate system.
8. 8 . The substrate of claim 1 , wherein: the monolithic structure is formed relative to an orthogonal x-y-z coordinate system where the z-axis is perpendicular to both the first side and the second side; and the dielectric material comprises ceramic fibers substantially aligned with a z-axis of the x-y-z coordinate system.
9. 9 . The substrate of claim 1 , wherein: the monolithic structure is formed relative to an orthogonal x-y-z coordinate system where the z-axis is perpendicular to both the first side and the second side; the dielectric material comprises ceramic fibers substantially aligned with an x-y plane of the x-y-z coordinate system; and the dielectric material comprises ceramic fibers substantially aligned with a z-axis of the x-y-z coordinate system.
10. 10 . The substrate of claim 1 , wherein: the monolithic structure comprises one or more vias that extend between the first side and the second side.
11. 11 . The substrate of claim 10 , wherein: the one or more vias comprise an electrically conductive surface between the first side and the second side of the monolithic structure.
12. 12 . The substrate of claim 1 , wherein: the lattice structure comprises a gyroid lattice structure.
13. 13 . The substrate of claim 1 , further comprising: a metallized layer on the first side, the second side, or both the first side and the second side of the monolithic structure.
14. 14 . The substrate of claim 13 , further comprising the vias, wherein: the vias comprise an electrically conductive surface between the first side and the second side of the monolithic structure that are in electrical connection with the metallized layer of the first side, the second side, or both the first side and the second side.
15. 15 . The substrate of claim 1 , wherein: the lattice structure of the intermediate region has a uniform distribution of the dielectric material and the interstitial spaces.
16. 16 . The substrate of claim 1 , wherein: the first side is planar, the second side is planar, and the second side is parallel with the first side.
17. 17 . The substrate of claim 1 , wherein: the first side is disposed equidistant with respect to the second side.
18. 18 . The substrate of claim 17 , wherein: the first side and the second side are curved.
19. 19 . The substrate of claim 1 , wherein: the monolithic structure is formed relative to an orthogonal x-y-z coordinate system where the z-axis is perpendicular to both the first side and the second side; and the substrate is operational at a defined frequency f having an operational wavelength λ, and the overall thickness of the substrate in the z-direction is equal to or less than λ/2.
20. 20 . The substrate of claim 19 , wherein: the monolithic structure is formed relative to an orthogonal x-y-z coordinate system where the z-axis is perpendicular to both the first side and the second side; and the substrate is operational at a defined frequency f having an operational wavelength λ, and the overall thickness of the substrate in the z-direction is equal to or less than λ/4.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Application Ser. No. 63/357,386, filed Jun. 30, 2022, which is incorporated herein by reference in its entirety. BACKGROUND The present disclosure relates generally to a low permittivity radio frequency substrate, an assembly of the same, and a method of making the same. Substrates having a low permittivity, or low Dk (dielectric constant), are often preferred to be used in certain RF (radio frequency) radiating elements like patch antennas. In these antenna constructions, as the Dk of the substrate decreases, a smaller portion of the electric field is confined and less energy is stored within the substrate, enabling higher radiation efficiency, wider bandwidth, and increased gain antennas. Materials used today to mimic air having a Dk=1, while providing rigidity and support for a printed antenna, are typically formed of foamed polymer materials. However, foam materials prohibit common fabrication techniques like plated vias for stacked patch designs and other multi-layered circuit designs. In addition, foam materials cannot be metalized and/or imaged directly on the surface since they are porous, so other circuit materials must be laminated to the foam surface causing additional processing complications. As such, end users either have to overcome the challenges of constructing a low Dk substrate system or use a higher Dk laminate. Prior solutions have involved laminating circuit material to a foam spacer (typically imaged before to avoid process chemistry leeching into the foam), and running z-axis wires to connect the circuit planes on the top and bottom of the low Dk space (foam) since you cannot drill and plate vias. While existing foamed polymer substrates useful in RF applications may be suitable for their intended purpose, the art relating to low permittivity RF substrates would be advanced with a substrate that overcomes one or more of the aforementioned limitations. BRIEF SUMMARY An embodiment includes a substrate, an assembly, and a method, as defined by the appended independent claims. Further advantageous modifications of the substrate, assembly, and method, are defined by the appended dependent claims. An embodiment includes a substrate having: a monolithic structure formed from a dielectric material having a first side, a second side, and an intermediate region between the first side and the second side; wherein the intermediate region has a lattice structure of the dielectric material having a plurality of interstitial spaces between the dielectric material of the lattice structure; wherein the lattice structure extends between and monolithically connects with the first side and the second side; wherein at least one of the first side and the second side has a substantially solid surface suitably configured to support one or more of: electronic circuit imaging; electroplating; metal deposition; or, vias between the first side and the second side. An embodiment includes a multi-layer assembly having two or more of the aforementioned substrate, wherein each of the substrate is mechanically attached, adhesively bonded, or fusion bonded, to an adjacent one of the substrate. An embodiment includes a method of making the aforementioned substrate having the aforementioned monolithic structure wherein the method includes: in a continuous process, forming the first side of the substrate; via the continuous process, forming the intermediate region of the substrate on and monolithic with the first side, the intermediate region having the lattice structure of the dielectric material comprising the plurality of interstitial spaces between the dielectric material of the lattice structure; and via the continuous process, forming the second side of the substrate on and monolithic with the intermediate region. The above features and advantages and other features and advantages of the invention are readily apparent from the following detailed description of the invention when taken in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Referring to the exemplary non-limiting drawings wherein like elements are numbered alike in the accompanying Figures: FIG. 1A depicts a rotated isometric view of a substrate, in accordance with an embodiment; FIG. 1B depicts a plan view of example generic electronic circuitry representative of being suitable for use with the substrate of FIG. 1, in accordance with an embodiment; FIG. 2A depicts a cross section view of the substrate of FIG. 1A, in accordance with an embodiment; FIG. 2B depicts an alternative cross section view to that of FIG. 2A, in accordance with an embodiment; FIG. 3A depicts a rotated isometric view of an enlarged portion of the substrate of FIG. 1A depicting a surface-based lattice structure, in accordance with an embodiment; FIG. 3B depicts the rotated isometric view of FIG. 3A depicting ceramic fibers, in accordance with an embodiment; F