US-12628270-B2 - Dimple on circuit board for providing standoff between circuit board and circuit package

Abstract

An information handling resource may include a circuit board comprising an electrically-conductive pad and a dimple formed on the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board.

Inventors

• Earl Boone
• James L. Petivan
• Wallace H. Ables
• Steven R. ETHRIDGE

Assignees

• DELL PRODUCTS L.P.

Dates

Publication Date

20260512

Application Date

20231106

Claims (20)

1. 1 . An information handling resource comprising: a circuit board comprising an electrically-conductive pad; and a dimple formed on the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board, wherein: an interior surface defining the depression is curved and a portion of the depression is below the surface of the circuit board; an exterior surface of the dimple is concave; and a height of the dimple is approximately equal to a distance between the surface of the circuit board and a surface of a circuit package configured to be electrically and mechanically coupled to the circuit board.
2. 2 . The information handling resource of claim 1 , further comprising: the circuit package comprising an electrically-conductive pin; and reflowed solder electrically coupling the electrically-conductive pad to the electrically-conductive pin, wherein the reflowed solder mechanically couples to the exterior surface of the dimple.
3. 3 . The information handling resource of claim 2 , wherein the circuit package is a bottom-terminated component.
4. 4 . The information handling resource of claim 1 , wherein the raised perimeter is raised between approximately 2 mils and approximately 4 mils above the surface.
5. 5 . The information handling resource of claim 1 , wherein the dimple is circular in shape.
6. 6 . The information handling resource of claim 1 , wherein the dimple is formed on a surface of an electrically-conductive pad of the circuit board.
7. 7 . The information handling resource of claim 1 , wherein the dimple is formed on the surface of the circuit board.
8. 8 . An information handling system comprising: a processor; and an information handling resource comprising: a circuit board comprising an electrically-conductive pad; and a dimple formed on a surface of the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board, wherein: an interior surface defining the depression is curved and a portion of the depression is below the surface of the circuit board; an exterior surface of the dimple above the surface of the circuit board is concave; and a height of the dimple is approximately equal to a distance between the surface of the circuit board and a surface of a circuit package configured to be electrically and mechanically coupled to the circuit board.
9. 9 . The information handling system of claim 8 , further comprising: the circuit package comprising an electrically-conductive pin; and reflowed solder electrically coupling the electrically-conductive pad to the electrically-conductive pin, wherein the reflowed solder mechanically couples to the exterior surface of the dimple.
10. 10 . The information handling system of claim 9 , wherein the circuit package is a bottom-terminated component.
11. 11 . The information handling system of claim 8 , wherein the raised perimeter is raised between approximately 2 mils and approximately 4 mils above the surface.
12. 12 . The information handling system of claim 8 , wherein the dimple is circular in shape.
13. 13 . The information handling system of claim 8 , wherein the dimple is formed on a surface of an electrically-conductive pad of the circuit board.
14. 14 . The information handling system of claim 8 , wherein the dimple is formed on the surface of the circuit board.
15. 15 . A method comprising: forming a circuit board with an electrically-conductive pad; and forming a dimple on the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board, wherein; an interior surface defining the depression is curved and a portion of the depression is below the surface of the circuit board; an exterior surface of the dimple above the surface of the circuit board is concave; and a height of the dimple is approximately equal to a distance between the surface of the circuit board and a surface of a circuit package configured to be electrically and mechanically coupled to the circuit board.
16. 16 . The method of claim 15 , further comprising electrically coupling an electrically-conductive pin of the circuit package to the electrically-conductive pad with reflowed solder, wherein the reflowed solder mechanically couples to the exterior surface of the dimple.
17. 17 . The method of claim 16 , wherein the circuit package is a bottom-terminated component.
18. 18 . The method of claim 15 , further comprising forming the dimple such that the raised perimeter is raised between approximately 2 mils and approximately 4 mils above the surface.
19. 19 . The method of claim 15 , further comprising forming the dimple such that the dimple is circular in shape.
20. 20 . The method of claim 15 , wherein forming the dimple comprises forming the dimple on a surface of an electrically-conductive pad of the circuit board.

Description

TECHNICAL FIELD The present disclosure relates in general to information handling systems, and more particularly to systems and methods for improving solder joint reliability and reduction of voids in an interface between a circuit board and a package mounted thereto, in particular one or more dimples formed on a surface of a circuit board that act as standoffs between a circuit board and the package after a solder reflow process. BACKGROUND As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems. Information handling systems may often use one or more circuit boards. A circuit board may comprise a substrate of a plurality of conductive layers separated and supported by layers of insulating material laminated together, with conductive traces disposed on and/or in any of such conductive layers, with vias for coupling conductive traces of different layers together, and with pads for coupling electronic components (e.g., packaged integrated circuits, slot connectors, etc.) to conductive traces of the circuit board. In some instances, one or more integrated circuit packages may be mounted upon the circuit board. For example, using traditional approaches, solder bumps may be placed atop pads of a circuit board, and pins of an integrated circuit package and associated with the pads may be aligned with the solder bumps and placed in contact with the solder bumps. During a solder reflow process, the circuit board, pads, and solder bumps may be subjected to heat, melting the solder bumps such that when the heat is removed, the solder bumps provide mechanical strength to electrically couple the pins of the integrated circuit package to their corresponding circuit board pads. In some instances, integrated circuit packages may be implemented using a bottom terminated component (BTC), such as a quad flat no-lead (QFN) package. Existing screen-printing solder technology produces a solder joint between a BTC and a circuit board of about 1.0 to 1.5 mils (wherein 1.0 mil equals one-thousandth of an inch). However, increasing solder joint height to 2.0 to 3.0 mils may improve solder joint reliability and allow flux residue to escape the solder joint during reflow in order to minimize voids. SUMMARY In accordance with the teachings of the present disclosure, the disadvantages and problems associated with existing approaches to mounting a circuit package to a printed circuit board may be reduced or eliminated. In accordance with embodiments of the present disclosure, an information handling resource may include a circuit board comprising an electrically-conductive pad and a dimple formed on the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board. In accordance with these and other embodiments of the present disclosure, an information handling system may include a processor and an information handling resource comprising a circuit board comprising an electrically-conductive pad and a dimple formed on a surface of the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board. In accordance with these and other embodiments of the present disclosure a method may include forming a circuit board with an electrically-conductive pad and forming a dimple on the circuit board, the dimple having a depression surrounded by a raised perimeter raised above a surface of the circuit board. Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and c