US-12628368-B2 - Semiconductor device and method of manufacturing semiconductor device

US12628368B2US 12628368 B2US12628368 B2US 12628368B2US-12628368-B2

Abstract

A semiconductor device according to the present invention includes a substrate, a plurality of semiconductor layers to be overlaid on the substrate and a gate electrode, a drain electrode, and a source electrode provided on the plurality of semiconductor layers, wherein each of the plurality of semiconductor layers includes a channel layer made with GaN and a barrier layer provided in contact with an upper surface of the channel layer and made with Al x Ga 1-x N, and a carbon concentration of the channel layer included in an uppermost semiconductor layer among the plurality of semiconductor layers is lower than an average value of carbon concentration of the channel layer included in the at least one semiconductor layer other than the uppermost semiconductor layer among the plurality of semiconductor layers.

Inventors

Ryohei Nonoda
Atsushi ERA

Assignees

MITSUBISHI ELECTRIC CORPORATION

Dates

Publication Date: 20260512
Application Date: 20190205

Claims (10)

1 . A semiconductor device comprising: a substrate; a plurality of pairs of semiconductor layers on the substrate; and a gate electrode, a drain electrode, and a source electrode provided on the plurality of pairs of semiconductor layers, wherein each of the plurality of pairs of semiconductor layers includes a channel layer made with GaN and a barrier layer provided in contact with an upper surface of the channel layer and made with Al x Ga 1-xN , a carbon concentration of the channel layer included in an uppermost pair of semiconductor layers among the plurality of pairs of semiconductor layers is lower than an average value of carbon concentration of the channel layers included in the pairs of semiconductor layers other than the uppermost pair of semiconductor layers, and the uppermost pair of semiconductor layers is an uppermost pair of channel and barrier layers in the semiconductor device.
2 . The semiconductor device according to claim 1 , wherein a two-dimensional electron gas is formed at an interface with the barrier layer in the channel layer in each of the plurality of pairs of semiconductor layers.
3 . The semiconductor device according to claim 1 , wherein the channel layer included in the uppermost pair of semiconductor layers is thinner than the channel layer included in one of the pairs of semiconductor layers other than the uppermost pair of semiconductor layers.
4 . The semiconductor device according to claim 1 , wherein the carbon concentration of the channel layer included in the uppermost pair of semiconductor layers is lower than the carbon concentration of the channel layer included in the pair of semiconductor layers immediately below the uppermost pair of semiconductor layers.
5 . The semiconductor device according to claim 1 , wherein the channel layer included in the uppermost pair of semiconductor layers and the barrier layer included in the pair of semiconductor layers immediately below the uppermost pair of semiconductor layers contact each other.
6 . The semiconductor device according to claim 1 , wherein a sum of respective film thicknesses of the channel layer included in the uppermost pair of semiconductor layers and the barrier layer included in the pair of semiconductor layers immediately below the uppermost pair of semiconductor layers is 20 nm or less.
7 . The semiconductor device according to claim 1 , wherein in each barrier layer included in each of the pairs of semiconductor layers other than the uppermost pair of semiconductor layers-layer, x is 0.2 or more.
8 . The semiconductor device according to claim 1 , wherein the carbon concentration of the channel layer included in the uppermost pair of semiconductor layers is 3×10 16 cm −3 or less.
9 . The semiconductor device according to claim 1 , wherein the average value of the carbon concentration of the channel layer included in each of the pairs of semiconductor layers other than the uppermost pair of semiconductor layers is 1×10 16 cm −3 or more.
10 . The semiconductor device according to claim 1 , wherein the channel layer included in an uppermost pair of semiconductor layers among the plurality of pairs of semiconductor layers includes carbon as an impurity.

Description

FIELD The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. BACKGROUND PTL 1 discloses a heterostructure field effect transistor having AlGaN layers, to which impurities are added, provided therein above and below a high-purity GaN layer and having a hetero stacked film Oobtained by forming heterointerfaces in two stages. Channels are respectively formed on the GaN layer side of the heterointerfaces between a source and a drain. With such a structure, a plurality of channels are formed in parallel in a device depth direction, and an ON resistance is reduced in inverse proportion to the number of channels. Therefore, an energization loss can be reduced. CITATION LIST Patent Literature [PTL 1] WO2000/65663 SUMMARY Technical Problem In the heterostructure field effect transistor as in PTL 1, carbon is incorporated into a channel layer at a high concentration so that a current collapse may be conspicuous. In the heterostructure field effect transistor, a leak current may be generated. The present invention has been made to solve the above-described problem, and is directed to obtaining a semiconductor device capable of suppressing a current collapse and a leak current and a method of manufacturing the semiconductor device. Solution to Problem A semiconductor device according to the present invention includes a substrate, a plurality of semiconductor layers to be overlaid on the substrate and a gate electrode, a drain electrode, and a source electrode provided on the plurality of semiconductor layers, wherein each of the plurality of semiconductor layers includes a channel layer made with GaN and a barrier layer provided in contact with an upper surface of the channel layer and made with AlxGa1-xN, and a carbon concentration of the channel layer included in an uppemlost semiconductor layer among the plurality of semiconductor layers is lower than an average value of carbon concentrations of the channel layers included in the semiconductor layers other than the uppermost semiconductor layer among the plurality of semiconductor layers. A method of manufacturing a semiconductor device according to the present invention includes a first step of supplying a Ga source gas and an N source gas and growing a lower channel layer made with GaN on a substrate, a second step of supplying the Ga source gas, the N source gas, and an Al source gas and growing a lower barrier layer made with AlxGa1-xN to contact an upper surface of the lower channel layer, a third step of supplying the Ga source gas and the N source gas with a V/III ratio made higher than that in the first step and growing an upper channel layer made with GaN on the lower barrier layer, a fourth step of supplying the Ga source gas, the N source gas, and the Al source gas and growing an upper barrier layer made with AlxGa1-xN to contact an upper surface of the upper channel layer and a step of forming a gate electrode, a drain electrode, and a source electrode on the upper barrier layer. Advantageous Effects of Invention In the semiconductor device according to the present invention, the carbon concentration of the channel layer included in the uppermost semiconductor layer among the plurality of semiconductor layers is lower than the average value of the carbon concentrations of the channel layers in the lower layers. When the carbon concentration of the channel layer included in the uppermost semiconductor layer that is easily affected by a trap is reduced, a current collapse can be effectively suppressed. The carbon concentrations of the channel layers in the lower layers are set high. Accordingly, an effect of suppressing a leak current by carbon can be obtained. In the method of manufacturing the semiconductor device according to the present invention, the upper channel layer is grown with the V/III ratio in the third step made higher than that in the first step. Therefore, the carbon concentration of the upper channel layer is lower than the carbon concentration of the lower channel layer. When the carbon concentration of the upper channel layer that is easily affected by a trap is reduced, a current collapse can be effectively suppressed. The carbon concentration of the lower channel layer is set high. Accordingly, an effect of suppressing a leak current by carbon in the lower channel layer can be obtained. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a cross-sectional view of a semiconductor device according to the first embodiment. FIG. 2 is a diagram for describing, a method of manufacturing the semiconductor device according to the first embodiment. FIG. 3 is a cross-sectional view of a semiconductor device according to a modification to the first embodiment. FIG. 4 is a diagram for describing a method of manufacturing a semiconductor device according to the second embodiment. FIG. 5 is a diagram for describing a method of manufacturing a semiconductor device according to a comparative example. FIG.