US-12628374-B2 - Semiconductor device and method of manufacturing the same

US12628374B2US 12628374 B2US12628374 B2US 12628374B2US-12628374-B2

Abstract

An improved power MOSFET of a split gate structure including a gate electrode and a field plate electrode in a trench is disclosed. The improved power MOSFET includes a field plate electrode FP formed at a lower portion of a trench TR and a gate electrode GE formed an upper portion of the trench TR. The field plate electrode FP further includes a contact portion FPa which is formed at the upper portion of the trench TR to provide a source potential. The gate electrode GE further includes a connecting portion GEa at the both sides of the contact portion FPa in the trench TR. The connecting portion GEa electrically connects between one portion of the gate electrode GE at a region 2A side and the other portion of the gate electrode GE at a region 2A′ side.

Inventors

Yuya ABIKO
Takahiro Maruyama

Assignees

RENESAS ELECTRONICS CORPORATION

Dates

Publication Date: 20260512
Application Date: 20230307
Priority Date: 20220622

Claims (5)

1 . A semiconductor device comprising: a semiconductor substrate of a first conductivity type having an upper surface and a lower surface; a trench formed in the semiconductor substrate so as to reach a predetermined depth from the upper surface of the semiconductor substrate and extending to a first direction in a plan view; a field plate electrode formed at a lower portion inside the trench; a gate electrode formed in an upper portion inside the trench and being electrically isolated from the field plate electrode inside the trench; an interlayer insulating film formed on the upper surface of the semiconductor substrate; a source electrode formed on the interlayer insulating film so as to cover the trench; a gate wiring formed on the interlayer insulating film so as to surround the source electrode in a plan view; and a first hole, a second hole and a third hole each formed in the interlayer insulating film, wherein the gate electrode includes a first end portion and a second end portion located on an opposite side of the first end portion in the first direction in a plane view, wherein the field plate electrode further includes a contact portion at the upper portion inside the trench which is located between the first end portion and the second end portion of the gate electrode in a plan view, wherein the first hole is formed so as to overlap the first end portion of the gate electrode in a plan view, wherein the second hole is formed so as to overlap the second end portion of the gate electrode in a plan view, wherein the third hole is formed so as to overlap the contact portion of the field plate electrode in a plan view, wherein the gate wiring is embedded in the first hole and the second hole and is electrically connected to the gate electrode, wherein the source electrode is embedded in the third hole and electrically connected to the field plate electrode, and wherein the gate electrode further includes a connecting portion electrically connecting the first end portion and the second end portion in the trench in which the contact portion of the field plate electrode is formed.
2 . A semiconductor device according to claim 1 , wherein the contact portion of the field plate electrode and the connecting portion of the gate electrode extend in the first direction respectively, and wherein the connecting portion of the gate electrode is formed on a side surface of the contact portion of the field plate electrode via an insulating film in a second direction intersecting the first direction in a plan view.
3 . A semiconductor device according to claim 1 , wherein the gate electrode and the connection portion are formed of an integrated polycrystalline silicon film.
4 . A semiconductor device according to claim 1 , further comprising: a body region formed on the upper surface of the semiconductor substrate and having a second conductivity type opposite to the first conductivity type so as to be shallower than the trench; a source region of the first conductivity type formed in the body region; a drain electrode formed on the lower surface of the semiconductor substrate; and a fourth hole formed in the interlayer insulating film, the source region and in the body region, wherein the source electrode is embedded in the fourth hole and is electrically connected to the source region and the body region.
5 . A semiconductor device according to claim 1 , wherein the gate wiring is in direct contact with at least one of the first end portion and the second end portion.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The disclosure of Japanese Patent Application No. 2022-100574 filed on Jun. 22, 2022, including the specification, drawings and abstract is incorporated herein by reference in its entirety. BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, relates to a semiconductor device including a gate electrode and a field plate electrode in a trench. In a semiconductor device such as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a trench gate structure in which a gate electrode is embedded in a trench is applied. One type of the trench gate structure is a split gate structure in which a field plate electrode is formed at a lower portion of a trench and a gate electrode is formed at an upper portion of the trench. The field plate electrode is electrically connected to a source electrode. Accordingly, the breakdown voltage of the semiconductor device can be improved by widening a depletion layer from the field plate electrode at the time of turn-off. For example, Japanese unexamined Patent Application publication JP-A-2018-82202 discloses a semiconductor device to which a double gate structure is applied. In JP-A-2018-82202, a source wiring is disposed in a central portion of the semiconductor device, a gate wiring is disposed in an outer periphery of the source wiring, and a wiring for a field plate electrode (control electrode wiring) is disposed in an outer periphery of the gate wiring. The control electrode wiring is physically and electrically separated from the source wiring and the gate wiring. Therefore, by connecting an external connection member such as wire bonding for supplying a desired potential to the control electrode wiring, not only the source potential but also the desired potential can be supplied to the control electrode wiring. SUMMARY OF THE INVENTION In the case where the control electrode is used as a field plate electrode fixed to the source potential, in JP-A-2018-82202, since the wiring for the field plate electrode is independent of the wiring for the source, it is necessary to connect separate external connection members to these wirings. Therefore, the layout of the semiconductor device becomes inefficient, and the manufacturing process and the manufacturing cost for connecting the external connection members are increased. In view of them, it is efficient to make a connection to the field plate electrode below the source electrode. However, in this case, since it is necessary to expose the field plate electrode to the upper surface of the semiconductor substrate, a region in which the field plate electrode is formed is provided in the entire inside of the trench. Then, the gate electrode is divided by the region. Therefore, in the outer peripheral region of the semiconductor device, it is necessary to individually connect the gate wirings with the divided gate electrodes. Here, the gate electrode and the gate wiring are connected through holes formed in the interlayer insulating film, but there is a possibility that the holes do not reach the gate electrode completely due to, for example, a case where the etching amount at the time of forming the holes is insufficient. Even if a hole to one of the divided gate electrodes is normally formed, if the hole to the other of the divided gate electrodes is not opened, MOSFET using the other gate electrode will not function. A main purpose of the present invention is to provide a technique capable of causing a MOSFET using the gate electrode to function normally even if a hole to the other of the divided gate electrodes is not opened, thereby to improve the reliability of the semiconductor device. Other objects and novel features will become apparent from the description of this specification and the attached drawings. The typical ones of embodiments disclosed in the present application will be briefly described as follows. A semiconductor device according to one embodiment comprising: a semiconductor substrate of a first conductivity type having an upper surface and a lower surface;a trench formed in the semiconductor substrate so as to reach a predetermined depth from the upper surface of the semiconductor substrate and extending to a first direction in a plan view;a field plate electrode formed at a lower portion inside the trench;a gate electrode formed in an upper portion inside the trench and being electrically isolated from the field plate electrode inside the trench;an interlayer insulating film formed on the upper surface of the semiconductor substrate;a source electrode formed on the interlayer insulating film so as to cover the trench;a gate wiring formed on the interlayer insulating film so as to surround the source electrode in a plan view; anda first hole, a second hole and a third hole each formed in the interlayer insulating film, wherein the gate electrode includes a first