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US-12628388-B2 - Monocrystalline SiC substrates having an asymmetrical geometry and method of producing same

US12628388B2US 12628388 B2US12628388 B2US 12628388B2US-12628388-B2

Abstract

The present invention provides a monocrystalline SiC substrate with an asymmetric shape for enhancing substrate stiffness against thermal induced deformations, the substrate comprising: a main region, and an asymmetric region located at a peripheral region of the substrate and adjacent to the main region, wherein the asymmetric region is inclined inwards, relative to the main region, to provide an asymmetric shape to the substrate. The present invention also provides a method of producing one or more substrates with an asymmetric shape, comprising: performing a multi-wire sawing process in which one or more substrates are cut with an wire-sawing web from an ingot placed on a stage, and cutting the one or more substrates with the asymmetric shape by controlling a relative movement between the wire-sawing web and the stage, the relative movement causing the wire-sawing web to describe a non-linear sawing path across the ingot to cut the asymmetric shape.

Inventors

  • Kuniyoshi Okamoto
  • Michael Vogel

Assignees

  • SICRYSTAL GMBH

Dates

Publication Date
20260512
Application Date
20220414
Priority Date
20210414

Claims (14)

  1. 1 . A monocrystalline SiC substrate with an asymmetric shape for enhancing substrate stiffness against thermal induced deformations, the monocrystalline SiC substrate comprising: a main region with a substantially flat surface; and an asymmetric region located at a peripheral region of the substrate and adjacent to the main region, wherein the asymmetric region is inclined inwards, relative to a front side of the main region, to provide said asymmetric shape to the monocrystalline SiC substrate, wherein the asymmetrical region has the shape of a circular segment delimited between the adjacent main region and a rim of the substrate, wherein the asymmetric shape formed by the main region and the asymmetric region is provided by cutting the monocrystalline SiC substrate with said asymmetric shape from a SiC crystal.
  2. 2 . The monocrystalline SiC substrate of claim 1 , wherein the asymmetric region joins the main region in a continuous manner, the inclination between the asymmetric region and the main region defining a cross-section of the asymmetric shape with either a sharp bend or a rounded bend on a backside of the substrate.
  3. 3 . The monocrystalline SiC substrate of claim 1 , wherein the asymmetric region is so dimensioned and inclined inwards, relative to the main region, such that a maximum height of the substrate rim that delimits the asymmetric region is in the range of 15 μm to 60 μm with respect to a reference place of the main region.
  4. 4 . The monocrystalline SiC substrate of claim 3 , wherein said maximum height corresponds to a maximum height at an intersection of a reference plane of the asymmetric region with the substrate rim that delimits the asymmetric region, with respect to the reference plane of the main region, and/or said maximum height corresponds to 25 μm.
  5. 5 . The monocrystalline SiC substrate of claim 1 , wherein the asymmetric region is so dimensioned and inclined inwards, relative to the main region, such that a maximum distance between a projection, onto a reference plane of the main region, of the substrate rim that delimits the asymmetric region and the main region is in the range of 5 mm to 30 mm.
  6. 6 . The monocrystalline SiC substrate of claim 3 , wherein the reference plane of the main region corresponds to a median surface of the substrate without the peripheral region of the substrate, and/or the reference plane of the asymmetric region corresponds to a median surface of the asymmetric region; and/or said maximum distance corresponds to 15 mm.
  7. 7 . The monocrystalline SiC substrate of claim 1 , wherein the substrate is provided with an orientation flat or an orientation notch, the asymmetric region being located on the substrate peripheral area that is opposed to the orientation flat or the orientation notch, and the angular displacement of the asymmetric region is between ±90° with respect to the orientation flat or notch or notch.
  8. 8 . The monocrystalline SiC substrate of claim 1 , wherein the asymmetric region is so dimensioned and inclined inwards, relative to the main region, such that a maximum height of the substrate rim that delimits the asymmetric region, with respect to a Si-side of the substrate at the main region, is a positive height.
  9. 9 . The monocrystalline SiC substrate of claim 1 , wherein the substrate formed by the main and asymmetric regions is characterized by: a BOW value in the range of −40 μm to 0 μm, and/or a WARP value of less than 70 μm.
  10. 10 . The monocrystalline SiC substrate of claim 1 , wherein the thickness of the asymmetric and main regions is in the range of 200 μm to 1000 μm, and/or the substrate has a partial cylindrical shape, at the main region, with a diameter d larger than 149.5 mm, and/or the substrate has a total thickness variation smaller than 5 μm, and/or at the main region, the SiC crystal structure has an a° off-axis orientation of the basal plane (1000) which is between 0.5° and 8° off-axis orientation.
  11. 11 . The monocrystalline SiC substrate of claim 1 , wherein said asymmetrical region has a substantially flat shape or a non-flat shape with a convex or a concave curvature.
  12. 12 . The monocrystalline SiC substrate of claim 7 , wherein the angular displacement of the asymmetric region with respect to the orientation flat or notch corresponds to ±60°.
  13. 13 . The monocrystalline SiC substrate of claim 10 , wherein the BOW value is in the range of −35 μm to 0 μm, and/or the WARP value corresponds to 45 μm.
  14. 14 . The monocrystalline SiC substrate of claim 11 , wherein said thickness of the asymmetric and main regions is in the range of 250 μm to 500 μm, and/or said α° off-axis orientation of the basal plane (1000) corresponds to a 4° off-axis orientation.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to monocrystalline SiC substrates having an asymmetrical geometry for increasing substrate stiffness against thermally-induced internal stresses and method of producing same. BACKGROUND OF THE INVENTION Silicon carbide (SiC) substrates are generally used for the manufacture of electronic components. Using a suitable source material, the SiC monocrystals (also referred to as SiC ingots) are grown as standard using the physical vapour deposition (PVT) process. The SiC substrates are then made from the grown SiC monocrystals with the help of, for e.g., multi-wire saws and the surface is then refined using multi-stage polishing steps. In the subsequent epitaxial processes, thin single-crystal layers (e.g. SiC, GaN) are first deposited on the SiC substrates. The properties of these layers and the components made therefrom depend crucially on the quality of the SiC substrate. The production of SiC crystals may be carried out by the standard method of physical vapour deposition (PVT), such as described in U.S. Pat. No. 8,865,324 B2. The raw SiC crystals obtained in this way are then oriented using e.g. X-rays in such a way that the lattice planes have the orientation required for further processing. Through various surface processing steps, e.g. by grinding, the subsequent substrate diameter is then set on the monocrystalline SiC semi-finished product, the flat or flats are attached and the end faces of the crystal cylinders processed in this way are prepared for the separation process, e.g. multi-wire saws. The SiC semi-finished product prepared in this way is then separated into individual raw substrates, for e.g. using a multi-wire sawing process. After a quality control, further mechanical processing of the raw monocrystalline SiC substrates takes place. For instance, after the raw substrate edges have been mechanically processed, single or multi-stage grinding or polishing processes are used to remove the interfering layer that was introduced by the separation process and to gradually reduce the roughness. A one or two-sided chemo-mechanical polishing process (CMP) is then used to set the final surface. In the subsequent epitaxial processes, single-crystal layers of semiconductors materials (for e.g. SiC, GaN) are then deposited onto the SiC substrates. The properties of these epitaxial layers, and of the components made therefrom, depend crucially on the quality of the underlying SiC substrate. For the production of the epitaxial (EPI) layers, the geometry of the substrates in particular is of great importance. For example, the thermal coupling in an EPI reactor (crucial for homogeneous, high-quality layer growth) can only be guaranteed for panes that do not show any significant bending. For this reason, properties of the manufactured semiconductor substrates such as bow and warp, which characterize the flatness of the substrates, are of particular concern. As standard definitions used in silicon wafers, bow measurements indicate the deviation of the centre point of the median surface of a free, un-clamped wafer from the median surface reference plane established by three points equally spaced on a circle, such as a three-point plane defined around the edge of the wafer. BOW can be negative or positive depending on whether the centre point is below or above the reference plane. Warp measurements indicate the difference between the maximum and minimum distances of the median surface from the reference plane by taking into account the entire median surface of the substrate rather than only the centre point as in bow measurements. Another important parameter of manufactured semiconductor substrates is the total thickness variation (TTV), which is the difference between the maximum and minimum thicknesses of the substrate. The median surface may be defined as the locus of points in the wafer that are equidistant between the front and back surfaces. In semiconductor epitaxial processes, the SiC substrate is in general placed on a flat plate or support, with the backside of the substrate facing the plate (i.e. the substrate side opposed to the front side of the substrate on which the epitaxial growth is intended to take place). The plate with the SiC substrate is then put into a reactor for carrying out the epitaxial process, during which temperatures of 1500° C. or higher are commonly reached. Silane and light hydrocarbons, such as propane or ethylene, diluted in hydrogen are typically used as a carrier gas to deposit a semiconductor layer(s), such as SiC layer(s), onto the front side of the SiC substrate. Thus, if the SiC substrate is warped over its entire area, there will be an area of the substrate backside that is in contact with the plate and an area that is separated from the plate by a gap. In addition, the thermal gradients established inside the reactor (both radially and axially) for the epitaxial growth lead to a non-uniform, in-plane dist