US-12628395-B2 - Hemt semiconductor device with a AlInGaN layer for polarity control
Abstract
According to one embodiment, a semiconductor device, includes first to third electrodes, first to third layers, and an insulating member. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes first to fifth partial regions. The fourth partial region is located between the first and third partial regions. The fifth partial region is located between the third and second partial regions. The second layer includes a first compound region provided between the third partial region and the third electrode. The third layer includes first to third portions. The third portion is located between the third partial region and the first compound region. The insulating member includes a first insulating region. The first insulating region is located between the first compound region and the third electrode.
Inventors
- Peitsen WU
- Shigeya Kimura
- Hisashi Yoshida
Assignees
- KABUSHIKI KAISHA TOSHIBA
Dates
- Publication Date
- 20260512
- Application Date
- 20220805
- Priority Date
- 20220302
Claims (15)
- 1 . A semiconductor device, comprising: a first electrode; a second electrode; a third electrode, a position of the third electrode in a first direction from the first electrode to the second electrode being between a position of the first electrode in the first direction and a position of the second electrode in the first direction; a first layer including SiC, the first layer including a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region, a direction from the first partial region to the first electrode being along a second direction crossing the first direction, a direction from the second partial region to the second electrode being along the second direction, a direction from the third partial region to the third electrode being along the second direction, the fourth partial region being located between the first partial region and the third partial region in the first direction, the fifth partial region being located between the third partial region and the second partial region in the first direction; a second layer including Al x In y Ga 1-x-y N (x+y=1, 0≤x<1, 0≤y≤1), the second layer including a first compound region provided between the third partial region and the third electrode; a third layer including Al z Ga 1-z N (x<z≤1), the third layer including a first portion, a second portion, and a third portion, a direction from the fourth partial region to the first portion being along the second direction, a direction from the fifth partial region to the second portion being along the second direction, the third portion being located between the third partial region and the first compound region, the third layer contacting the first layer; and an insulating member including a first insulating region, the first insulating region being located between the first compound region and the third electrode, the second layer not including a region overlapping the fourth partial region in the second direction, and not including a region overlapping the fifth partial region in the second direction, or the second layer including a second compound region and a third compound region, a direction from the fourth partial region to the second compound region and a direction from the fifth partial region to the third compound region being along the second direction, a first thickness of the first compound region along the second direction being thicker than a second thickness of the second compound region along the second direction, and thicker than a third thickness of the third compound region along the second direction, wherein the first thickness is thicker than a thickness of the third portion along the second direction, a value of z is 0.8 or more, a value of x is not less than 0.01 and not more than 0.5, and a thickness of the third portion along the second direction is not less than 2 nm and not more than 4 nm.
- 2 . The device according to claim 1 , wherein the third layer includes AlN.
- 3 . The device according to claim 1 , wherein a value of x is 0.1 or less.
- 4 . The device according to claim 1 , wherein the first thickness is 1.05 times or more a thickness of the third portion along the second direction.
- 5 . The device according to claim 1 , wherein a value of y is not less than 0.01 and not more than 0.2, and a thickness of the third portion along the second direction is not less than 3 nm.
- 6 . The device according to claim 1 , wherein the insulating member further includes a second insulating region and a third insulating region, the first portion is located between the fourth partial region and the second insulating region, and is in contact with the fourth partial region and the second insulating region, and the second portion is located between the fifth partial region and the third insulating region, and is in contact with the fifth partial region and the third insulating region.
- 7 . The device according to claim 1 , wherein a thickness of the first insulating region along the second direction is not less than 20 nm and not more than 100 nm.
- 8 . The device according to claim 1 , wherein the second layer includes a second compound region and a third compound region, and the first thickness is 1.05 times or more the second thickness, and is 1.05 times or more the third thickness.
- 9 . The device according to claim 1 , wherein the second layer includes a second compound region and a third compound region, and the first thickness is 1.5 times or more the second thickness, and is 1.5 times or more the third thickness.
- 10 . The device according to claim 1 , wherein the second layer includes a second compound region and a third compound region, and the first compound region is located between a portion of the third layer and an other portion of the third layer in the first direction.
- 11 . The device according to claim 1 , wherein the second layer includes a second compound region and a third compound region, and the first compound region is located between a part of the insulating member and an other part of the insulating member in the first direction.
- 12 . The device according to claim 1 , wherein the second layer does not include a first element, or a concentration of the first element in the second layer is less than 1×10 17 cm 3 , and the first element includes at least one selected from the group consisting of Mg, Zn and C.
- 13 . The device according to claim 1 , wherein the third electrode includes a region not overlapping the first compound region in the second direction.
- 14 . The device according to claim 1 , wherein the device is configured to operate in a normally-off mode.
- 15 . A semiconductor device, comprising: a first electrode; a second electrode; a third electrode, a position of the third electrode in a first direction from the first electrode to the second electrode being between a position of the first electrode in the first direction and a position of the second electrode in the first direction; a first layer including SiC, the first layer including a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region, a direction from the first partial region to the first electrode being along a second direction crossing the first direction, a direction from the second partial region to the second electrode being along the second direction, a direction from the third partial region to the third electrode being along the second direction, the fourth partial region being located between the first partial region and the third partial region in the first direction, the fifth partial region being located between the third partial region and the second partial region in the first direction; a second layer including Al x In y Ga 1-x-y N (x+y=1, 0≤x<1, 0≤y≤1), the second layer including a first compound region provided between the third partial region and the third electrode; a third layer including Al z Ga 1-z N (x<z≤1), the third layer including a first portion, a second portion, and a third portion, a direction from the fourth partial region to the first portion being along the second direction, a direction from the fifth partial region to the second portion being along the second direction, the third portion being located between the third partial region and the first compound region; and an insulating member including a first insulating region, the first insulating region being located between the first compound region and the third electrode, the second layer not including a region overlapping the fourth partial region in the second direction, and not including a region overlapping the fifth partial region in the second direction, or the second layer including a second compound region and a third compound region, a direction from the fourth partial region to the second compound region and a direction from the fifth partial region to the third compound region being along the second direction, a first thickness of the first compound region along the second direction being thicker than a second thickness of the second compound region along the second direction, and thicker than a third thickness of the third compound region along the second direction, wherein the first thickness is thicker than a thickness of the third portion along the second direction, a value of z is 0.8 or more, a value of x is not less than 0.01 and not more than 0.5, and a thickness of the third portion along the second direction is not less than 2 nm and not more than 4 nm.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2022-031682, filed on Mar. 2, 2022; the entire contents of which are incorporated herein by reference. FIELD Embodiments of the invention generally relate to a semiconductor device. BACKGROUND For example, there is a semiconductor device using SiC. Good characteristics are desired in semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to a first embodiment; FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment; FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment; FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment; FIGS. 5A to 5D are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment; and FIGS. 6A to 6C are schematic cross-sectional views illustrating the method for manufacturing a semiconductor device according to the embodiment. DETAILED DESCRIPTION According to one embodiment, a semiconductor device, includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating member. A position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first layer includes SiC. The first layer includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region. A direction from the first partial region to the first electrode is along a second direction crossing the first direction. A direction from the second partial region to the second electrode is along the second direction. A direction from the third partial region to the third electrode is along the second direction. The fourth partial region is located between the first partial region and the third partial region in the first direction. The fifth partial region is located between the third partial region and the second partial region in the first direction. The second layer includes AlxInyGa1-x-yN (x+y=1, 0≤x<1, 0≤y≤1). The second layer includes a first compound region provided between the third partial region and the third electrode. The third layer includes AlzGa1-zN (x<z≤1). The third layer includes a first portion, a second portion, and a third portion. A direction from the fourth partial region to the first portion is along the second direction. A direction from the fifth partial region to the second portion is along the second direction. The third portion is located between the third partial region and the first compound region. The insulating member includes a first insulating region. The first insulating region is located between the first compound region and the third electrode. The second layer does not include a region overlapping the fourth partial region in the second direction, and does not include a region overlapping the fifth partial region in the second direction. Or the second layer includes a second compound region and a third compound region. A direction from the fourth partial region to the second compound region and a direction from the fifth partial region to the third compound region are along the second direction. A first thickness of the first compound region along the second direction is thicker than a second thickness of the second compound region along the second direction, and thicker than a third thickness of the third compound region along the second direction. According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating member. A position of the third electrode in a first direction from the first electrode to the second electrode is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first layer includes SiC. The first layer includes a first partial region, a second partial region, a third partial region, a fourth partial region and a fifth partial region. A direction from the first partial region to the first electrode is along a second direction crossing the first direction. A direction from the second partial region to the second electrode is along the second direction. A direction from the third partial region to the third electrode is along the second direction. The fourth partial region is located between the first partial region and the third partial region in the first direction. The fifth partial region is located between the third partial