US-12628431-B2 - Layouts of data pads on a semiconductor die

US12628431B2US 12628431 B2US12628431 B2US 12628431B2US-12628431-B2

Abstract

Layouts for data pads on a semiconductor die are disclosed. An apparatus may include circuits, a first edge, a second edge perpendicular to the first edge, a third edge opposite the first edge, and a fourth edge opposite the second edge. The apparatus may also include data pads variously electrically coupled to the circuits. The data pads may include a data pad positioned a first distance from the first edge and a second distance from the second edge. The apparatus may also include dummy data pads electrically isolated from the circuits. The dummy data pads may include a dummy data pad positioned substantially the first distance from the first edge and substantially the second distance from the fourth edge. Associated systems and methods are also disclosed.

Inventors

Andreas Kuesel
Takamasa Suzuki

Assignees

MICRON TECHNOLOGY, INC.

Dates

Publication Date: 20260512
Application Date: 20220831

Claims (15)

1 . An apparatus comprising: circuits; a first edge; a second edge perpendicular to the first edge; a third edge opposite the first edge; a fourth edge opposite the second edge; data pads variously electrically coupled to the circuits, the data pads comprising: a data pad positioned a first distance from the first edge and a second distance from the second edge; and dummy data pads electrically isolated from the circuits, the dummy data pads comprising: a dummy data pad positioned substantially the first distance from the first edge and substantially the second distance from the fourth edge.
2 . The apparatus of claim 1 , wherein the data pad comprises a first data pad, wherein the dummy data pad comprises a first dummy data pad, wherein the data pads further comprise a second data pad positioned a third distance from the first edge and a fourth distance from the second edge, and wherein the dummy data pads further comprise a second dummy data pad positioned substantially the third distance from the first edge and substantially the fourth distance from the fourth edge.
3 . The apparatus of claim 1 , wherein the data pad comprises a first data pad, wherein the dummy data pad comprises a first dummy data pad, wherein the data pads further comprise a second data pad positioned a third distance from the third edge and a fourth distance from the second edge, and wherein the dummy data pads further comprise a second dummy data pad positioned substantially the third distance from the third edge and substantially the fourth distance from the fourth edge.
4 . The apparatus of claim 1 , wherein the data pad comprises a first data pad, wherein the dummy data pad comprises a first dummy data pad, wherein the data pads further comprise a second data pad positioned the first distance from the third edge and the second distance from the second edge, and wherein the dummy data pads further comprise a second dummy data pad positioned substantially the first distance from the third edge and substantially the second distance from the fourth edge.
5 . The apparatus of claim 1 , wherein an arrangement of the data pads is symmetrical about an axis of symmetry to an arrangement of the dummy data pads, wherein the axis of symmetry is substantially parallel with the second edge and between the second edge and the fourth edge.
6 . The apparatus of claim 1 , wherein the data pads and the dummy data pads are arranged such that: if the apparatus were flipped substantially 180° about an axis between the second edge and the fourth edge, the axis substantially parallel to the second edge, the data pads would be in first positions formerly occupied by the dummy data pads and the dummy data pads would be in second positions formerly occupied by the data pads; or if a mirrored-symmetric instance of the apparatus were stacked above the apparatus, data pads of the mirrored-symmetric instance of the apparatus would be above the dummy data pads of the apparatus and dummy data pads of the mirrored-symmetric instance of the apparatus would be above data pads of the apparatus.
7 . The apparatus of claim 1 , wherein the data pads comprise a first category of data pads and a second category of data pads, the data pads comprising: a first first-category data pad that is a third distance from the first edge and a fourth distance from the second edge; a second first-category data pad that is substantially the third distance from the first edge and substantially the fourth distance from the fourth edge; a first second-category data pad that is a fifth distance from the first edge and an sixth distance from the second edge; and a second second-category data pad that is substantially the fifth distance from the first edge and substantially the sixth distance from the fourth edge.
8 . The apparatus of claim 7 , wherein the first category of data pads are to communicate a first category of signals and the second category of data pads are to communicate a second category of signals.
9 . An apparatus comprising: dies stacked into a stack, one above another, each of the dies substantially identical to each of the other dies, or each of a first subset of the dies exhibits mirror symmetry with respect to each of a second subset of the dies, each of the dies comprising: circuits; data pads variously electrically coupled to the circuits; and dummy data pads electrically isolated from the circuits, data pads of at least one of the dies electrically coupled to dummy data pads of another at least one of the dies.
10 . The apparatus of claim 9 , wherein each of the dies substantially identical to each of the other dies; wherein a first substantially half of the dies are oriented in a first orientation; wherein a second substantially half of the dies are oriented in a second orientation, the second orientation flipped substantially 180°, relative to the first orientation, about an axis in a respective plane of each of the respective dies; and wherein the dummy data pads are arranged relative to the data pads such that respective data pads of dies oriented in the first orientation vertically align, in the stack, with respective dummy data pads of dies oriented in the second orientation.
11 . The apparatus of claim 10 , wherein dies of a top or bottom substantially half of the stack is oriented in the first orientation.
12 . The apparatus of claim 9 , wherein each of the first subset of the dies exhibits mirror symmetry with respect to each of the second subset of the dies; and wherein the dummy data pads are arranged relative to the data pads such that respective data pads of dies of the first subset vertically align, in the stack, with respective dummy data pads of dies of the second subset.
13 . The apparatus of claim 12 , wherein dies of a top or bottom substantially half of the stack are of the first subset.
14 . The apparatus of claim 9 , wherein each of the dies substantially identical to each of the other dies; wherein a first substantially half of the dies are oriented in a first orientation; wherein a second substantially half of the dies are oriented in a second orientation, the second orientation rotated substantially 180° about an axis normal to a plane of the respective die; and wherein the dummy data pads are arranged relative to the data pads such that respective data pads of dies oriented in the first orientation vertically align, in the stack, with respective dummy data pads of dies oriented in the second orientation.
15 . The apparatus of claim 14 , wherein dies of a top or bottom substantially half of the stack is oriented in the first orientation.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation-in-part of U.S. patent application Ser. No. 17/646,565, filed Dec. 30, 2021. U.S. patent application Ser. No. 17/823,638 is being filed on even date herewith, the disclosure of each of which is hereby incorporated herein in its entirety by this reference. TECHNICAL FIELD Embodiments of the disclosure relate to semiconductor-die layouts, and more specifically to layouts of data pads on a semiconductor die. Yet more specifically, various embodiments relate to layouts of data pads, dummy data pads, and common data pads on a die to allow for stacking of a number of dies. Other embodiments related to stacks of dies and methods of stacking dies. Additionally, embodiments include related methods, devices, and systems. BACKGROUND Memory devices are typically provided as semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including, for example, random-access memory (RAM), read-only memory (ROM), dynamic random-access memory (DRAM), synchronous dynamic random-access memory (SDRAM), resistive random-access memory (RRAM), double-data-rate memory (DDR), low-power double-data-rate memory (LPDDR), phase-change memory (PCM), high-bandwidth memory (HBM) and Flash memory. Some memory devices include two or more dies (also commonly referred to as “dice”) stacked one above another. In the present disclosure, the terms “die” and “dies” may refer to a semiconducting material on and/or in which one or more circuits (including, e.g., memory arrays) are or may be fabricated. BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS While this disclosure concludes with claims particularly pointing out and distinctly claiming specific embodiments, various features and advantages of embodiments within the scope of this disclosure may be more readily ascertained from the following description when read in conjunction with the accompanying drawings, in which: FIG. 1 is a functional block diagram illustrating an example memory device, in accordance with at least one embodiment of the disclosure. FIG. 2A is a plan-view diagram illustrating an example layout of a die in accordance with at least one embodiment of the disclosure. FIG. 2B is a plan-view diagram illustrating an example layout of pads of an example DW area of the die of FIG. 2A in accordance with at least one embodiment of the disclosure. FIG. 3 is a plan-view diagram illustrating an example layout of data pads, dummy data pads, and common data pads on an example die in accordance with at least one embodiment of the disclosure. FIG. 4 is a perspective-view diagram illustrating an example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 5 is a perspective-view diagram illustrating another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 6 is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 7 is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 8A is a plan-view diagram illustrating another example layout 802a of positions for data pads, dummy data pads and/or common data pads on an example die 800a in accordance with at least one embodiment of the disclosure. FIG. 8B is a plan-view diagram illustrating yet another example layout of data pads, dummy data pads and common data pads on an example die in accordance with at least one embodiment of the disclosure. FIG. 8C is a plan-view diagram illustrating yet another example layout of data pads, dummy data pads and common data pads on an example die in accordance with at least one embodiment of the disclosure. FIG. 8D is a plan-view diagram illustrating yet another example layout of data pads, dummy data pads and common data pads on an example die in accordance with at least one embodiment of the disclosure. FIG. 9A is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 9B is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 9C is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 10 is a perspective-view diagram illustrating yet another example stack of dies in accordance with at least one embodiment of the disclosure. FIG. 11 is a flowchart illustrating an example method in accordance with at least one embodiment of the disclosure. FIG. 12 is a flowchart illustrating another example method in accordance with at least one embodiment of the disclosure. FIG. 13 is a flowchart illustrating yet another example method in accordance with at least one embodiment of the disclosure. FIG. 14