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US-12628434-B2 - Low capacitance high holding voltage transient voltage suppressing device

US12628434B2US 12628434 B2US12628434 B2US 12628434B2US-12628434-B2

Abstract

A transient voltage suppressing (TVS) device including a first silicon-controlled rectifier and a voltage clamp having a first terminal and a second terminal. The first terminal is connected to a cathode of the first silicon-controlled rectifier.

Inventors

  • Shekar Mallikarjunaswamy
  • Juan Luo

Assignees

  • ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP

Dates

Publication Date
20260512
Application Date
20230414

Claims (15)

  1. 1 . A transient voltage suppressing (TVS) device comprising: a first silicon-controlled rectifier, wherein the first silicon-controlled rectifier includes an intrinsic diode, and the intrinsic diode acts as a low side steering diode for current from the voltage clamp; a voltage clamp having a first terminal and a second terminal, wherein the first terminal is connected to an anode of the first silicon-controlled rectifier; and a low side steering diode connected in parallel with the first silicon-controlled rectifier wherein a cathode of the low side steering diode is connected to the anode of the first silicon-controlled rectifier and the first terminal of the voltage clamp.
  2. 2 . The TVS device of claim 1 wherein the voltage clamp is a PNP transistor, an NPN transistor or a silicon-controlled rectifier.
  3. 3 . A transient voltage suppressing (TVS) device comprising: a first silicon-controlled rectifier, wherein the first silicon-controlled rectifier includes an intrinsic diode, and the intrinsic diode acts as a low side steering diode for current from the voltage clamp; and a voltage clamp having a first terminal and a second terminal, wherein the first terminal is connected to an anode of the first silicon-controlled rectifier.
  4. 4 . The TVS device of claim 1 wherein the low side steering diode is configured to have a low capacitance.
  5. 5 . The TVS device of claim 1 wherein the first silicon-controlled rectifier and the low side steering diode are formed from the same substrate composition.
  6. 6 . The TVS device of claim 1 further comprising a second silicon-controlled rectifier; and wherein the second terminal is connected to an anode of the second silicon-controlled rectifier.
  7. 7 . The TVS device of claim 6 wherein the second silicon-controlled rectifier includes an intrinsic diode, and wherein the intrinsic diode acts the low side steering diode for current from the voltage clamp.
  8. 8 . The TVS device of claim 6 wherein the first silicon-controlled rectifier and the second silicon-controlled rectifier are formed from the same substrate composition.
  9. 9 . The TVS device of claim 6 further comprising a low side steering diode connected in parallel with the second silicon-controlled rectifier wherein the cathode of the low side steering diode is connected to the anode of the second silicon-controlled rectifier and the second terminal of the voltage clamp.
  10. 10 . The TVS device of claim 9 wherein the low side steering diode, the first silicon-controlled rectifier and the second silicon-controlled rectifier are formed from the same substrate composition.
  11. 11 . The TVS device of claim 6 further comprising one or more additional silicon-controlled rectifiers having an anode connected to either the first terminal of the voltage clamp or the second terminal of the voltage clamp.
  12. 12 . The TVS device of claim 1 wherein first silicon-controlled rectifier is configured to have low capacitance and the voltage clamp is configured to have a floating base and holding voltage between 3 to 16 volts.
  13. 13 . The TVS device of claim 1 wherein the voltage clamp is a PNP transistor or NPN transistor and the first terminal is a collector, and the second terminal is an emitter or the first terminal is the emitter, and the second terminal is the collector.
  14. 14 . The TVS device of claim 1 wherein the voltage clamp is a symmetric silicon-controlled rectifier, and wherein the first terminal is an anode, and the second terminal is a cathode or the first terminal is a cathode and the second terminal is an anode.
  15. 15 . The TVS device of claim 1 wherein the voltage clamp is configured to have a holding voltage between 3 to 300 volts.

Description

FIELD OF THE DISCLOSURE Aspects of the present disclosure relate to transient voltage suppressing (TVS) devices, specifically aspects of the present disclosure relate to low capacitance high voltage transient voltage suppressing devices. BACKGROUND OF THE DISCLOSURE TVS devices may use the snap back voltage of a bipolar transistor, or silicon-controlled rectifier (SCR) to shunt high voltage transients away from more delicate circuitry. The snap back voltage is the voltage at which the avalanche breakdown or impact ionization occurring within the transistor (or rectifier) provides sufficient current to turn the transistor to the “on” state allowing current to flow freely through the transistor. In some TVS devices snap back voltage may be chosen that is less than the voltage spike tolerance of a device connected to the channel of the TVS such that the TVS device triggers when the snapback voltage is exceeded thus protecting the connected devices. Thus the snapback voltage of the TVS may be referred to as the trigger voltage as it is the voltage that triggers the TVS, Transistors or rectifiers in a TVS device may have a high trigger voltage creating a circuit where reverse voltage is normally blocked until a sufficiently high voltage spike occurs switching the TVS device on and shunting current away from the connected device. The holding voltage in a TVS device is the minimum voltage that must be maintained through the TVS device to remain in the on state after a transient voltage spike. A high holding voltage is needed in some applications to avoid system latch up. Conventional low capacitance high holding voltage TVS devices are realized by connecting a low capacitance forward diode (known as High Side Steering diode-HS) in series with a high reverse blocking large area/cap diode clamp. This reverse blocking clamp can be constructed using an avalanche diode, PNP, NPN or SCR device. The Low Side (LS) diode required for ESD conduction is constructed using a low cap/area steering diode that is in parallel with the HS diode in series with the large area diode clamp. Consequently, the holding voltage is determined by the snap-back voltage of corresponding NPN, PNP or SCR device and the blocking capability of their breakdown voltage. In this configuration, it is difficult to independently scale the reverse breakdown voltage and the intrinsic snap-back voltage of the TVS as they are interdependent. It is within this context that aspects of the present disclosure arise. BRIEF DESCRIPTION OF THE DRAWINGS The teachings of the present disclosure can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which: FIG. 1A is an equivalent circuit diagram of a Prior Art unidirectional TVS device. FIG. 1B is a circuit diagram of a layout of a prior art bidirectional high holding voltage TVS device. FIG. 2A is a circuit diagram depicting the improved TVS device according to aspects of the present disclosure. FIG. 2B is a circuit diagram depicting the improved TVS using an intrinsic diode of the SCR instead of a low side diode according to aspects of the present disclosure. FIG. 2C is a circuit diagram of the improved high holding voltage TVS device having two channels according to aspects of the present disclosure. FIG. 2D is a circuit diagram of the improved high holding voltage TVS device having an NPN transistor acting as the voltage clamp according to aspects of the present disclosure. FIG. 2E is a circuit diagram of the improved high holding voltage TVS device having an SCR acting as the voltage clamp according to aspects of the present disclosure. FIG. 3 is a vertical cross section diagram of the improved high holding voltage TVS device with HS SCR and LS diodes according to aspects of the present disclosure. FIG. 4 is a vertical cross section diagram of the improved high holding voltage TVS device having two SCR device component regions and using the intrinsic diode of the SCR for reverse conduction according to aspects of the present disclosure. FIG. 5 is a vertical cross section diagram of the improved high holding voltage TVS device having a different SCR layout according to aspects of the present disclosure. FIG. 6 is a vertical cross section diagram of the improved high holding voltage TVS device having a voltage clamp that is a symmetrical SCR according to aspects of the present disclosure. FIG. 7 is a top-down view of the improved high holding voltage TVS device showing an implementation of the top metallization, vias, and component area layout according to aspects of the present disclosure. DESCRIPTION OF THE SPECIFIC EMBODIMENTS Although the following detailed description contains many specific details for the purposes of illustration, anyone of ordinary skill in the art will appreciate that many variations and alterations to the following details are within the scope of the invention. Accordingly, the examples of embodiments of the invention