US-12628450-B2 - Defect prevention methods for pixel-array substrates

Abstract

A method for preventing defects in a thin film deposited on a semiconductor substrate includes forming a plurality of trenches on a periphery-region of the semiconductor substrate to yield a trenched surface. The semiconductor substrate includes a pixel array; the periphery-region surrounds the pixel array. The trenched surface includes (i) a plurality of trench regions each forming a respective one of the plurality of trenches and (ii) between each pair of adjacent trenches, a respective one of a plurality of inter-trench surfaces. The method also includes depositing the thin film on the surface such that the thin film covers each inter-trench surface and conformally covers each trench region.

Inventors

• Qin Wang
• Gang Chen

Assignees

• OMNIVISION TECHNOLOGIES, INC.

Dates

Publication Date

20260512

Application Date

20221220

Claims (19)

1. 1 . A method for preventing defects in a thin film deposited on a semiconductor substrate that includes a pixel array, the method comprising: forming a plurality of trenches on a periphery-region of the semiconductor substrate to yield a trenched surface that includes (i) a plurality of trench regions each forming a respective one of the plurality of trenches and (ii) between each pair of adjacent trenches, a respective one of a plurality of inter-trench surfaces, the periphery-region surrounding the pixel array; and depositing the thin film on the periphery-region such that the thin film covers each inter-trench surface and conformally covers each trench region; the periphery-region comprising a conductive element, which is either a through-silicon via through the semiconductor substrate or a back-side ground contact on a surface of the semiconductor substrate; said forming comprising forming the plurality of trenches such that the conductive element is between two adjacent trenches of the plurality of trenches.
2. 2 . The method of claim 1 , forming the plurality of trenches comprising lithographically etching a surface of the periphery-region, the surface being part of a back surface of the semiconductor substrate.
3. 3 . The method of claim 1 , further comprising: annealing the thin film; and filling each of the plurality of trenches with at least one of an oxide material and a metal.
4. 4 . The method of claim 1 , in the step of forming, each trench of the plurality of trenches being perpendicular to and intersecting at least one other trench of the plurality of trenches, the plurality of trenches forming a grid.
5. 5 . The method of claim 1 , the semiconductor substrate including a central-region surrounded by the periphery-region and, in the step of forming, the plurality of trenches including a plurality of central-region trenches each traversing both the periphery-region and the central-region and being located between either (i) a pair of adjacent pixel-rows of the pixel array and (ii) a pair of adjacent pixel-columns of the pixel array.
6. 6 . The method of claim 1 , each inter-trench surface being a respective planar region of a back surface of the semiconductor substrate between two adjacent trenches of the plurality of trenches.
7. 7 . The method of claim 1 , in the step of forming, each trench of the plurality of trenches extending into the semiconductor substrate and having a depth, relative to a planar region of a back surface of the semiconductor substrate surrounding the trench, that is less than a thickness of the semiconductor substrate.
8. 8 . The method of claim 7 , in said step of forming, the plurality of trenches including a plurality of first peripheral-trenches and a plurality of second peripheral-trenches each perpendicular to each of the plurality of first peripheral-trenches.
9. 9 . The method of claim 8 , said step of forming resulting in the trenched surface including a trench grid structure, and further comprising filling each of the plurality of trenches with an insulating material.
10. 10 . The method of claim 1 , in said step of depositing, the thin film being a passivation layer.
11. 11 . The method of claim 10 , in said step of depositing, the passivation layer being formed of a high-material.
12. 12 . A method for preventing defects in a thin film deposited on a semiconductor substrate that includes a pixel array, the method comprising: forming a plurality of trenches on a periphery-region of the semiconductor substrate to yield a trenched surface that includes (i) a plurality of trench regions each forming a respective one of the plurality of trenches and (ii) between each pair of adjacent trenches, a respective one of a plurality of inter-trench surfaces, the periphery-region surrounding the pixel array; filling each of the plurality of trenches with an insulating material; and depositing the thin film on the periphery-region such that the thin film covers each inter-trench surface and conformally covers each trench region; the periphery-region comprising a conductive element, which is either a through-silicon via through the semiconductor substrate or a back-side ground contact on a surface of the semiconductor substrate; said forming comprising forming the plurality of trenches such that the conductive element is between two adjacent trenches of the plurality of trenches.
13. 13 . The method of claim 12 , said forming comprising forming the plurality of trenches such that a distance between the conductive element and any adjacent trenches of the plurality of trenches exceeds a process margin.
14. 14 . The method of claim 12 , said forming comprising forming the plurality of trenches such that one or more of the plurality of trenches is in part of the periphery-region located between a guard ring structure and the pixel array, wherein the guard ring structure surrounds the pixel array.
15. 15 . The method of claim 14 , said forming comprising forming the plurality of trenches such that a distance between the guard ring structure and any adjacent trenches of the plurality of trenches exceeds a process margin.
16. 16 . The method of claim 12 , in said step of depositing, the thin film being a passivation layer formed of a high-k material.
17. 17 . The method of claim 12 , in the step of forming, each trench of the plurality of trenches being perpendicular to and intersecting at least one other trench of the plurality of trenches, the plurality of trenches forming a grid.
18. 18 . The method of claim 12 , said forming comprising: etching the plurality of trenches with a gas etchant containing fluorine such that the fluorine reaches another surface of the semiconductor substrate that is opposite to the surface of the semiconductor substrate.
19. 19 . The method of claim 16 , after said depositing comprising: annealing the thin film using a hydrogen annealing process to densify the thin film.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application divisional application Ser. No. 16/905,670, filed on Jun. 18, 2020, the content of which is incorporated herein by reference in its entirety. BACKGROUND Camera modules in commercial products such as stand-alone digital cameras, mobile devices, automotive components, and medical devices include an image sensor. The image sensor includes a pixel array and, in a periphery-region surrounding the pixel array, analog devices. The image sensor includes a semiconductor substrate and a passivation layer on the substrate's back surface. The passivation layer is prone to developing bubble defects particularly around large surface area due to material-induced stress. The bubble defects often become cracked regions or peeling regions of the passivation layer, which increases noise in the periphery analog devices, and hence degrades the quality of images captured by the image sensor. SUMMARY OF THE EMBODIMENTS Embodiments disclosed here prevent bubble defects by including trenches in the periphery-region. In a first aspect, a pixel-array substrate includes a semiconductor substrate and a passivation layer. The semiconductor substrate includes a pixel array surrounded by a periphery-region. A back surface of the semiconductor substrate forms, in the periphery-region, a plurality of first peripheral-trenches extending into the semiconductor substrate. The passivation layer is on the back surface and lines each of the plurality of first peripheral-trenches. A second aspect is a method for preventing defects in a thin film deposited on a semiconductor substrate that includes a pixel array. The method includes forming a plurality of trenches on a periphery-region of the semiconductor substrate to yield a trenched surface. The periphery-region surrounds the pixel array. The trenched surface includes (i) a plurality of trench regions each forming a respective one of the plurality of trenches and (ii) between each pair of adjacent trenches, a respective one of a plurality of inter-trench surfaces. The method also includes depositing the thin film on the surface such that the thin film covers each inter-trench surface and conformally covers each trench region. BRIEF DESCRIPTION OF THE FIGURES FIG. 1 depicts a camera imaging a scene. FIG. 2 is a cross-sectional schematic and FIG. 3 is a plan view of a pixel-array substrate, which is an example of a pixel-array substrate of the camera of FIG. 1, in an embodiment. FIG. 4 is a cross-sectional schematic of an image sensor that includes the pixel-array substrate of FIGS. 2 and 3, in an embodiment. FIG. 5 is a flowchart illustrating a method for preventing defects in a thin film deposited on a substrate, in an embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS Reference throughout this specification to “one example” or “one embodiment” means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present invention. Thus, the appearances of the phrases “in one example” or “in one embodiment” in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples. Spatially relative terms, such as “beneath,” “below,” “lower,” “under,” “above,” “upper,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” or “under” other elements or features would then be oriented “above” the other elements or features. Thus, the terms “below” and “under” may encompass both an orientation of above and below. The device may be otherwise oriented (rotated ninety degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. In addition, it will also be understood that when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present. The term semiconductor substrate may refer to substrates formed using semiconductors such as silicon, silicon-germanium, germanium, gallium arsenide, and combinations thereof. The term semiconductor substrate may also refer to a substrate, formed of one or more semiconductors, subjected to previous process steps that form regions and/or junctions in the substrate. A semiconductor substrate may also include various features, such as doped and undoped semiconductors, epitaxial layers of silicon, and other semiconductor structures f