US-12628461-B2 - Passivation method for a passage opening of a wafer

US12628461B2US 12628461 B2US12628461 B2US 12628461B2US-12628461-B2

Abstract

A passivation method for a passage opening of a wafer, at least having the steps of: providing a wafer having a top, a bottom and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate that forms the bottom of the wafer, a Ge sub-cell, at least two III-V sub-cells, in the named order, and at least one passage opening extending from the top to the bottom of the wafer, with a contiguous side wall and a circumference that is oval in cross section, and applying a dielectric insulating layer by means of chemical vapor deposition to the top of the wafer, the bottom of the wafer and the side wall of the passage opening.

Inventors

Alexander Frey

Assignees

AZUR SPACE SOLAR POWER GMBH

Dates

Publication Date: 20260512
Application Date: 20200831
Priority Date: 20190829

Claims (11)

1 . A passivation method comprising: providing a wafer having a top, a bottom and at least two solar cell stacks, each of the at least two solar cell stacks has a Ge substrate that forms the bottom of the wafer, a Ge sub-cell, at least two III-V sub-cells and at least one passage opening extending from the top to the bottom of the wafer with a contiguous side wall and a circumference that is oval in cross section, the at least one passage opening having a first open end having a first diameter at the top of the wafer and a second open end having a second diameter at the bottom of the wafer, the second diameter being smaller than the first diameter; and after said providing the wafer with the at least one passage opening, applying a dielectric insulating layer via chemical vapor deposition to the top of the wafer, the bottom of the wafer and the side wall of the at least one passage opening, wherein the dielectric insulating layer is applied via a plasma-assisted vapor deposition, wherein the dielectric insulating layer contains SiOx or SiNx, and wherein the at least one passage opening has two stepped circumferential shoulders formed by a sudden decrease in a diameter of the at least one passage opening viewed from a top.
2 . The method according to claim 1 , wherein the applied dielectric insulating layer on the side wall of the passage opening has a layer thickness of at least 10 nm.
3 . The method according to claim 1 , wherein the dielectric insulating layer is first applied to the top of the wafer, then the wafer is rotated and then the dielectric insulating layer is applied to the bottom.
4 . The method according to claim 1 , wherein the first diameter is at most 1 mm and at least 50 μm on an edge bordering the top of the wafer, and wherein the wafer has an overall thickness of at most 300 μm and of at least 90 μm.
5 . The method according to claim 1 , wherein the dielectric insulating layer is formed as a layer system comprising a first layer and at least one second layer, and wherein the first layer is applied prior to the second layer.
6 . The method according to claim 1 , wherein the first diameter is at most 1 mm and at least 50 μm on an edge bordering the top of the wafer.
7 . The method according to claim 1 , wherein the second diameter is at most 1 mm and at least 50 μm on an edge bordering the bottom of the wafer.
8 . The method according to claim 1 , wherein the wafer that is provided has an overall thickness of at most 300 μm and of at least 90 μm.
9 . The method according to claim 1 , wherein the dielectric insulating layer is wet-chemically etched.
10 . The method according to claim 1 , wherein the at least one passage opening is a through-hole.
11 . A passivation method comprising: providing a wafer having a top, a bottom and at least two solar cell stacks, each of the at least two solar cell stacks has a Ge substrate that forms the bottom of the wafer, a Ge sub-cell, at least two III-V sub-cells and at least one passage opening extending from the top to the bottom of the wafer with a contiguous side wall and a circumference that is oval in cross section, the at least one passage opening having two stepped circumferential shoulders formed by a sudden decrease in a diameter of the at least one passage opening viewed from a top, the at least one passage opening having a first open end having a first diameter at the top of the wafer and a second open end having a second diameter at the bottom of the wafer, the second diameter being smaller than the first diameter; and after said providing the wafer with the at least one passage opening, applying a dielectric insulating layer via chemical vapor deposition to the top of the wafer, the bottom of the wafer and the side wall of the passage opening.

Description

This nonprovisional application claims priority under 35 U.S.C. § 119(a) to German Patent Application No. 10 2019 006 097.0, which was filed in Germany on Aug. 29, 2019, and which is herein incorporated by reference. BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a passivation method for a passage opening of a wafer. Description of the Background Art To reduce the shading of the front side of a solar cell, it is possible to arrange both the positive and the negative external contact surface on the rear side. In so-called metal wrap through (MWT) solar cells, the solar cell front side, for example, is contacted through a passage contact opening from the rear side. However, it is essential that the contact metallization within the passage contact opening is reliably insulated from all sub-cells. The prerequisite for a reliably closed insulating layer, however, is a mostly smooth side wall in the area of the passage contact opening that is free of undercuts. From “Via Sidewall Insulation for Through Cell via Contacts”, Mathieu de Lafontaine et al, AIP Conference Proceedings 1881, 040002 (2017), doi: 10.1063/1.5001424, a test method is known for testing the quality of an insulating layer on the side wall of a hole which extends into a solar cell stack. What is studied are SiO2 layers which either have been applied by means of plasma-assisted vapor deposition or by means of plasma-assisted atomic layer deposition on the top and side wall of a plurality of holes. The holes were created by means of a dry etching process. It was found that 40% of the insulating layers generated by means of vapor deposition had defects. SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a device which further develops the prior art. According to an exemplary embodiment of the invention, a passivation method is provided for a passage opening of a wafer, comprising at least the steps of: providing a wafer comprising a top, a bottom and a plurality of solar cell stacks, wherein each solar cell stack comprises a Ge-substrate that forms the bottom of the wafer, a Ge sub-cell, at least two III-V sub-cells, in the named order, and at least one passage opening that extends from the top to the bottom of the wafer, has a contiguous side wall and has a circumference that is oval in cross section; and applying a dielectric insulating layer by means of chemical vapor deposition to the top of the wafer, the bottom of the wafer and the side wall of the passage opening. The individual sub-cells of the solar cell stacks can each have a p/n junction and that the layers following the substrate are epitaxially generated on one another and/or connected to one another by means of wafer bonding. In addition, a Ge sub-cell can contain germanium or consists of germanium, wherein a layer consisting of germanium may optionally also contain other substances in addition to the germanium, in particular dopants, but also impurities. The same also applies for the III-V sub-cells, which comprise one or more materials of main groups III and V or consist of such materials. By means of vapor deposition, it is possible to achieve a conformal layer deposition. Thus, not only the top and the bottom, but also the respective areas adjacent to the side surface of the passage opening are coated over the entire surface. The full surface two-sided vapor deposition leads in particular to a contiguous and sufficiently thick insulating layer within the passage opening. An advantage of the method is thus that the two-sided full-surface coating using vapor deposition generates a reliable insulating layer within a passage opening without great additional effort. By means of the vapor deposition, it is also possible in a simple manner to successively apply layers with different materials or a different stoichiometry. A layer system made up of at least two different insulating layers makes it possible in turn to reduce the pinhole density and/or to increase the adhesion of a subsequent metallization. The dielectric insulating layer can be applied by means of plasma-assisted vapor deposition. This deposition method can be performed at lower temperatures of only about 100° to 500° C. The applied dielectric insulating layer on the side wall of the passage opening can have a layer thickness of at least 10 nm. It has been found that a layer thickness of 10 nm is sufficient to achieve reliable insulation. This is the case in particular when the pinhole density of the insulating layer is as low as possible, for example by using a layer system of at least two layers as the insulating layer and when the passage opening is free of undercuts. The dielectric insulating layer can includes SiOx and/or SiNx. The applied insulating layer can comprise in particular a layer system of at least two layers of SiOx and/or SiNx. The at least two layers are different, for example, with regard to the material or with regard to the stoich