US-12628527-B2 - Display substrate and display device with optimized charge-generating layer

US12628527B2US 12628527 B2US12628527 B2US 12628527B2US-12628527-B2

Abstract

An embodiment of the present disclosure provides a display substrate comprising a substrate comprising a display area and a peripheral area; a plurality of sub-pixels spaced apart by a pixel defining layer on the substrate and located in the display area, wherein the sub-pixels comprise: a first electrode; a first light-emitting layer; and a charge generating layer, wherein the pixel defining layer has a first opening exposing the first electrode, wherein an edge portion of the pixel defining layer adjacent to the first opening covers an edge portion of the first electrode, wherein the charge generating layer has a second opening, and an orthographic projection of the second opening on the substrate at least partially overlaps with an orthographic projection of the pixel defining layer on the substrate, wherein the charge generating layer has an edge portion adjacent to the second opening.

Inventors

Can Zhang
Xiaochuan Chen
Dacheng Zhang

Assignees

BOE TECHNOLOGY GROUP CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20220217

Claims (15)

1 . A display substrate, comprising: a substrate comprising a display area and a peripheral area located around the display area; a plurality of sub-pixels, on the substrate and located in the display area, spaced apart by a pixel defining layer, wherein the sub-pixels comprise: a first electrode located on the substrate; a first light-emitting layer located on the first electrode; and a charge generating layer located on the first light-emitting layer, wherein the pixel defining layer is located between the first electrode and the first light-emitting layer, and the pixel defining layer has a first opening exposing the first electrode, wherein an edge portion of the pixel defining layer adjacent to the first opening covers an edge portion of the first electrode, wherein the charge generating layer has a second opening, and an orthographic projection of the second opening on the substrate at least partially overlaps with an orthographic projection of the pixel defining layer on the substrate, wherein the charge generating layer has an edge portion adjacent to the second opening, an orthographic projection of the edge portion of the charge generating layer on the substrate overlaps with an orthographic projection of the pixel defining layer on the substrate and has a dimension greater than or equal to 0.01 μm and less than or equal to 0.5 μm in a direction parallel to the substrate, wherein the edge portion of the charge generating layer sequentially comprises a first edge portion and a second edge portion in a direction away from the first opening, a thickness of the first edge portion becomes gradually smaller toward the first opening, wherein a slope angle of the first edge portion is greater than or equal to 40° and less than or equal to 70°, wherein a slope angle of the edge portion of the pixel defining layer is greater than or equal to 80° and less than or equal to 90°, wherein the peripheral area comprises a wiring area and a cathode ring area located on at least on one side of the display area, which are arranged sequentially in a direction parallel to the substrate and away from the display area, wherein the peripheral area further comprises: a first dummy area surrounding the display area, and a second dummy area surrounding the cathode ring area, wherein the charge generating laver is also located in the first dummy area, the cathode ring area, and the second dummy area in the peripheral area of the substrate, and the second opening is not located in the first dummy area, the cathode ring area, and the second dummy area.
2 . The display substrate of claim 1 , further comprising: a second light-emitting layer located on the charge generating layer; and a second electrode located on the second light-emitting layer, wherein an orthographic projection of the edge portion of the charge generating layer on the substrate overlaps with an orthographic projection of the pixel defining layer on the substrate and has a dimension greater than or equal to 0.1 μm and less than or equal to 0.2 μm in a direction parallel to the substrate.
3 . The display substrate of claim 1 , wherein a thickness of the first edge portion is smaller than a thickness of the second edge portion.
4 . The display substrate of claim 1 , wherein the sub-pixel comprises one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
5 . The display substrate of claim 4 , wherein a portion of the charge generating layer between the red sub-pixel and the green sub-pixel does not have the second opening.
6 . The display substrate of claim 4 , wherein a portion of the charge generating layer between the red sub-pixel and the blue sub-pixel does not have the second opening.
7 . The display substrate of claim 2 , wherein the sub-pixel further comprises a hole injection layer and a first hole transport layer sequentially located between the first electrode and the first light-emitting layer, a first electron transport layer located between the first light-emitting layer and the charge generating layer, a second hole transport layer located between the charge generating layer and the second light-emitting layer, and a second electron transport layer and an electron injection layer sequentially located between the second light-emitting layer and the second electrode.
8 . The display substrate of claim 7 , wherein the hole injection layer is located in the first opening and covers at least a part of the edge portion of the pixel defining layer.
9 . The display substrate of claim 7 , wherein the hole injection layer is located in the first opening and covers a top surface of the pixel defining layer located in the display area.
10 . The display substrate of claim 7 , wherein the first hole transport layer covers a surface of the pixel defining layer away from the substrate and a surface of the hole injection layer away from the substrate.
11 . The display substrate of claim 7 , wherein an orthographic projection of the hole injection layer on the substrate overlaps an orthographic projection of the charge generating layer on the substrate.
12 . The display substrate of claim 7 , wherein the second hole transport layer is located in the second opening and covers a surface of the charge generating layer away from the substrate.
13 . A display device, comprising the display substrate of claim 1 .
14 . A display device, comprising the display substrate of claim 2 .
15 . A display device, comprising the display substrate of claim 3 .

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application claims a National Stage Entry of PCT/CN2022/076617, filed on Feb. 17, 2022, the disclosure of which is incorporated herein by reference herein in their entirety as part of the present application. FIELD The present disclosure relates to a field of display technology, and in particular, to a display substrate and a display device. BACKGROUND Virtual reality technology is widely used in various display devices. In order to make a displayed virtual reality scene free from graininess, a screen resolution (Pixel per inch, PPI) of the display device is generally greater than 2000 PPI. Since glass-based display devices have a smaller PPI, near-eye display devices based on virtual reality technology focus on silicon-based micro-displays (e.g., Micro-OLED, liquid crystal on silicon (LCOS), etc.). Compared with LCOS, Micro-OLED has many advantages, such as high contrast ratio and lower power consumption. Therefore, Micro-OLED is a hot research and development trend of silicon-based micro-displays. SUMMARY Embodiments of the present disclosure provide a display substrate and a display device. According to a first aspect of the present disclosure, a display substrate is provided. The display substrate comprises: a substrate comprising a display area and a peripheral area located around the display area; a plurality of sub-pixels, on the substrate and located in the display area, spaced apart by a pixel defining layer, wherein the sub-pixels comprise: a first electrode located on the substrate; a first light-emitting layer located on the first electrode; and a charge generating layer located on the first light-emitting layer, wherein the pixel defining layer is located between the first electrode and the first light-emitting layer, and the pixel defining layer has a first opening exposing the first electrode, wherein an edge portion of the pixel defining layer adjacent to the first opening covers an edge portion of the first electrode, wherein the charge generating layer has a second opening, and an orthographic projection of the second opening on the substrate at least partially overlaps with an orthographic projection of the pixel defining layer on the substrate, wherein the charge generating layer has an edge portion adjacent to the second opening, an orthographic projection of the edge portion of the charge generating layer on the substrate overlaps with an orthographic projection of the pixel defining layer on the substrate and has a dimension greater than or equal to 0.01 μm and less than or equal to 0.5 μm in a direction parallel to the substrate. In the embodiment of the present disclosure, the display substrate further comprises: a second light-emitting layer located on the charge generating layer; and a second electrode located on the second light-emitting layer, wherein an orthographic projection of the edge portion of the charge generating layer on the substrate overlaps with an orthographic projection of the pixel defining layer on the substrate and has a dimension greater than or equal to 0.1 μm and less than or equal to 0.2 μm in a direction parallel to the substrate. In the embodiment of the present disclosure, the edge portion of the charge generating layer sequentially comprises a first edge portion and a second edge portion in a direction away from the first opening, a thickness of the first edge portion becomes gradually smaller toward the first opening. In the embodiment of the present disclosure, a thickness of the first edge portion is smaller than a thickness of the second edge portion. In the embodiment of the present disclosure, a slope angle of the first edge portion is greater than or equal to 40° and less than or equal to 70°. In the embodiment of the present disclosure, a slope angle of the edge portion of the pixel defining layer is greater than or equal to 80° and less than or equal to 90° In the embodiment of the present disclosure, the peripheral area comprises a wiring area and a cathode ring area located on at least on one side of the display area, which are arranged sequentially in a direction parallel to the substrate and away from the display area. In the embodiment of the present disclosure, the peripheral area further comprises: a first dummy area surrounding the display area, and a second dummy area surrounding the cathode ring area, wherein the charge generating layer is also located in the first dummy area, the cathode ring area, and the second dummy area in the peripheral area of the substrate, and the second opening is not located in the first dummy area, the cathode ring area, and the second dummy area. In the embodiment of the present disclosure, the sub-pixel comprises one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel. In the embodiment of the present disclosure, a portion of the charge generating layer between the red sub-pixel and the green sub-pixel does not have the second opening. In the embodimen