US-12628615-B2 - Semiconductor structure
Abstract
Disclosed is a semiconductor structure. The semiconductor structure includes a support structure, and a first dielectric layer and a growth substrate sequentially formed on the support structure, where a gravity center of the support structure and a gravity center of the growth substrate are disposed in a staggered manner, so that the direct contact between the growth substrate and the graphite disk can be avoided, a centrifugal force on the growth substrate exerted by the graphite disk to the support structure can be transferred, thereby further ensuring a quality of the growth substrate, and significantly reducing a probability of cracking to ensure a crystal quality of a subsequent epitaxial layer. The support structure is formed at the bottom of the growth substrate, so that a mechanical strength of the semiconductor structure can be effectively improved, a stability can be enhanced, and a deformation of the semiconductor structure can be suppressed.
Inventors
- Kai Liu
- Kai Cheng
Assignees
- ENKRIS SEMICONDUCTOR, INC.
Dates
- Publication Date
- 20260512
- Application Date
- 20230629
- Priority Date
- 20220630
Claims (15)
- 1 . A semiconductor structure, comprising: a support structure, and a first dielectric layer and a growth substrate sequentially formed on the support structure, wherein a gravity center of the support structure and a gravity center of the growth substrate are disposed in a staggered manner, wherein the support structure and the growth substrate comprise a defect, and a defect density of the support structure is greater than a defect density of the growth substrate.
- 2 . The semiconductor structure according to claim 1 , wherein in a horizontal direction, a size of the support structure is not less than a size of the growth substrate.
- 3 . The semiconductor structure according to claim 2 , wherein in the horizontal direction, the size of the support structure is greater than the size of the growth substrate, and the growth substrate is entirely located above the support structure.
- 4 . The semiconductor structure according to claim 1 , wherein a sidewall of the support structure and/or a sidewall of the growth substrate are provided with a chamfer.
- 5 . The semiconductor structure according to claim 1 , wherein the support structure comprises a support substrate and a second dielectric layer wrapped on a surface of the support substrate.
- 6 . The semiconductor structure according to claim 5 , wherein a hardness of the second dielectric layer is less than a hardness of the support substrate.
- 7 . The semiconductor structure according to claim 1 , wherein the semiconductor structure further comprises a third dielectric layer disposed on a sidewall of the growth substrate.
- 8 . The semiconductor structure according to claim 7 , wherein a hardness of the third dielectric layer is less than a hardness of the growth substrate.
- 9 . The semiconductor structure according to claim 1 , wherein a width, along a direction of the support structure towards the growth substrate, of the support structure gradually decreases or increases first and then decreases.
- 10 . The semiconductor structure according to claim 1 , wherein materials of the support structure comprise one or more of Si, AlN, Al 2 O 3 , SiC, or ceramics.
- 11 . The semiconductor structure according to claim 1 , wherein a thickness of the support structure is less than 3 times a thickness of the growth substrate.
- 12 . The semiconductor structure according to claim 1 , wherein in a horizontal direction, a size of the support structure is greater than 1.2 times a size of the growth substrate.
- 13 . The semiconductor structure according to claim 1 , wherein a hardness of the support structure is greater than a hardness of the growth substrate.
- 14 . The semiconductor structure according to claim 1 , wherein a thermal expansion coefficient of the support structure is less than a thermal expansion coefficient of the growth substrate.
- 15 . The semiconductor structure according to claim 11 , wherein a thickness of the support structure is greater than a thickness of the growth substrate.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS The present disclosure claims priority to Chinese Patent Application No. 202221664248.4, filed on Jun. 30, 2022, all contents of which are incorporated herein in its entirety by reference. TECHNICAL FIELD The present disclosure relates to the field of semiconductor device technologies, and in particular, to a semiconductor structure. BACKGROUND In an epitaxial growth process of semiconductor materials, materials such as Si, SiC, and sapphire are usually selected as the material of epitaxial substrates to reduce costs. However, a difference between the epitaxial material and substrate materials leads to differences in lattice constant and thermal expansion coefficient. In addition, a graphite disk rotates fast during the epitaxial growth, the substrate is subjected to a great centrifugal force against the graphite disk, and the substrate is prone to deformation and warping, which introduces a high stress, and leads to a decrease in the mechanical strength of the substrate, thereby cracking in consequences. In the prior art, modulation of epitaxial layer materials is performed to reduce the stress. However, due to a limitation of the properties of the material itself, an improvement of the method is not large and a crystal quality of the epitaxial layer is easily reduced, lead to a decrease in device performance. And a stronger pre-reaction can be caused by reducing a rotational speed of the graphite disk to reduce a centrifugal force, so that a growth rate is reduced, pre-reaction particles are increased, and a morphology of the epitaxial layer is deteriorated, thereby increasing production costs while not ensuring the growth quality. In addition, in the prior art, a shape of a bearing groove of the graphite disk can also be designed to reduce a stress on the substrate and the graphite disk; however, the method requires matching different shapes for different the substrates, thereby significantly increasing research and development costs and reducing universality. SUMMARY To solve the above technical problems, the present disclosure is disclosed. The embodiments of the present disclosure provide a semiconductor structure, including: a support structure, and a first dielectric layer and a growth substrate sequentially formed on the support structure, where a gravity center of the support structure and a gravity center of the growth substrate are disposed in a staggered manner. Further, in a horizontal direction, a size of the support structure is not less than a size of the growth substrate. Further, in the horizontal direction, the size of the support structure is greater than the size of the growth substrate, and the growth substrate is entirely located above the support structure. Further, a sidewall of the support structure and/or a sidewall of the growth substrate are provided with a chamfer. Further, the support structure includes a support substrate and a second dielectric layer wrapped on a surface of the support substrate. Further, a hardness of the second dielectric layer is less than a hardness of the support substrate. Further, the semiconductor structure further includes a third dielectric layer disposed on a sidewall of the growth substrate. Further, a hardness of the third dielectric layer is less than a hardness of the growth substrate. Further, a width, along a direction of the support structure towards the growth substrate, of the support structure gradually decreases or increases first and then decreases. Further, materials of the support structure include one or more of Si, AlN, Al2O3, SiC, or ceramics. Further, a thickness of the support structure is less than 3 times a thickness of the growth substrate. Further, in a horizontal direction, a size of the support structure is greater than 1.2 times a size of the growth substrate. Further, the support structure and the growth substrate include a defect, and a defect density of the support structure is greater than a defect density of the growth substrate. Further, a hardness of the support structure is greater than a hardness of the growth substrate. Further, a thermal expansion coefficient of the support structure is less than a thermal expansion coefficient of the growth substrate. According to the semiconductor structure provided by the present disclosure, a support structure is formed at the bottom of a growth substrate, so that a mechanical strength of the semiconductor structure can be effectively improved, a stability can be enhanced, and a probability of fragmentation can be reduced by suppressing deformation; a first dielectric layer is disposed between the support structure and the growth substrate, so that defects in the support structure can be effectively prevented from extending upwards into the growth substrate, thereby improving a quality of the growth substrate and reducing a possibility of cracking during subsequent processes; and a gravity center of the support structure and a gravit