US-12628643-B2 - Laser-formed interconnects for redundant devices

Abstract

A parallel redundant system comprises a substrate, a first circuit disposed over the substrate, a first conductor disposed at least partially in a first layer over the substrate and wire routed to the first circuit, a second circuit disposed over the substrate, the second circuit redundant to the first circuit, a second conductor disposed in a second layer over the substrate and electrically connected to the second circuit, the second conductor disposed at least partially over the first conductor, a dielectric layer disposed at least partially between the first layer and the second layer, and a laser weld electrically connecting the first conductor to the second conductor.

Inventors

• Erich Radauscher
• Ronald S. Cok
• Matthew Alexander Meitl
• Christopher Andrew Bower
• Christopher Michael Verreen
• Erik Paul Vick

Assignees

• DAKTRONICS, INC.

Dates

Publication Date

20260512

Application Date

20230926

Claims (16)

1. 1 . A processable integrated circuit, comprising: an integrated circuit substrate; a circuit disposed in, on, or over the integrated circuit substrate; an electrical connector electrically connected to the circuit; and an opening structure electrically connected in serial between the electrical connector and the circuit, wherein the opening structure is constructed and arranged to form an electrical open when subjected to laser radiation.
2. 2 . The processable integrated circuit of claim 1 , comprising a package containing the integrated circuit substrate and wherein the electrical connector comprises an interconnection lead.
3. 3 . The processable integrated circuit of claim 2 , comprising a graphic disposed on the package, the graphic indicating the location of the opening structure.
4. 4 . The processable integrated circuit of claim 2 , wherein the opening structure is an electrical conductor disposed on, in, or over the integrated circuit substrate that electrically connects the interconnection lead to the circuit.
5. 5 . The processable integrated circuit of claim 1 , comprising a graphic indicating the location of the opening structure.
6. 6 . The processable integrated circuit of claim 1 , wherein the opening structure is a thermally activated fuse.
7. 7 . A method for processing an integrated circuit, comprising: providing an integrated circuit substrate, a circuit disposed in, on, or over the integrated circuit substrate, an electrical connector electrically connected to the circuit, and an opening structure electrically connected in serial between the electrical connector and the circuit; and exposing the opening structure to laser radiation, thereby forming an electrical open between the circuit and the electrical connector.
8. 8 . A parallel redundant system, comprising: a substrate; a first conductor disposed at least partially in a first layer over the substrate and wire routed to the first circuit; a second circuit disposed over the substrate; a second conductor disposed in a second layer over the substrate and electrically connected to the second circuit, the second conductor disposed at least partially over the first conductor; a dielectric layer disposed at least partially between the first layer and the second layer; and a laser weld electrically connecting the first conductor to the second conductor through the dielectric layer.
9. 9 . The parallel redundant system of claim 8 , comprising an interface circuit electrically connected to the first conductor and to the second circuit through the laser weld.
10. 10 . The parallel redundant system of claim 9 , wherein the second circuit is an integrated circuit.
11. 11 . The parallel redundant system of claim 10 , wherein the integrated circuit comprises an unpackaged semiconductor circuit and a broken tether.
12. 12 . The parallel redundant system of claim 10 , wherein the integrated circuit comprises an opening structure.
13. 13 . The parallel redundant system of claim 10 , wherein the integrated circuit comprises a shorting structure.
14. 14 . The parallel redundant system of claim 8 , comprising two or more first conductors disposed in the first layer and two or more second conductors disposed in the second layer each second conductor electrically connected to the second circuit.
15. 15 . The parallel redundant system of claim 14 , comprising two or more laser welds, each of the two or more laser welds electrically connecting one of the two or more first conductors to a corresponding one of the two or more second conductors.
16. 16 . The parallel redundant system of claim 14 , wherein one or more of the two or more first conductors is electrically connected to a corresponding one of the two or more second conductors.

Description

PRIORITY APPLICATIONS This application is a continuation of U.S. patent application Ser. No. 17/670,810, filed on Feb. 14, 2022, which is a continuation of U.S. patent application Ser. No. 16/702,352, filed on Dec. 3, 2019, which claims the benefit of U.S. Provisional Patent Application Ser. No. 62/778,519, filed on Dec. 12, 2018, the disclosure of each of which is hereby incorporated by reference herein in its entirety. CROSS REFERENCE TO RELATED APPLICATIONS Reference is made to U.S. patent application Ser. No. 14/807,226, filed on Jul. 23, 2015, entitled Parallel Redundant Chiplet System by Cok et al. and to U.S. patent application Ser. No. 16/054,823, filed on Aug. 3, 2018, entitled Parallel Redundant Chiplet System by Cok et al, the disclosure of each of which is hereby incorporated herein by reference in its entirety. TECHNICAL FIELD The present disclosure relates to circuit systems having redundant elements and methods for interconnecting elements therein. BACKGROUND Flat-panel displays are widely used in conjunction with computing devices, in portable devices, and for entertainment devices such as televisions. Such displays typically employ a plurality of pixels distributed over a display substrate to display images, graphics, or text. In a color display, each pixel includes light emitters that emit light of different colors, such as red, green, and blue. For example, liquid crystal displays (LCDs) employ liquid crystals to block or transmit light from a backlight behind the liquid crystals and organic light-emitting diode (OLED) displays rely on passing current through a layer of organic material that glows in response to the current. Displays using inorganic light emitting diodes (LEDs) are also in widespread use for outdoor signage and have been demonstrated in a 55-inch television. Inorganic light-emitting diode displays using inorganic micro-LEDs on a display substrate are also known. Micro-LEDs can have an area less than 1 mm square, less than 100 microns square, or less than 50 microns square or have an area small enough that it is not visible to an unaided observer of the display at a designed viewing distance. U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate. Displays are typically controlled with either a passive-matrix (PM) control employing electronic circuitry external to the display substrate or an active-matrix (AM) control employing electronic circuitry formed directly on the display substrate and associated with each light-emitting element. Both OLED displays and LCDs using passive-matrix control and active-matrix control are available. An example of such an AM OLED display device is disclosed in U.S. Pat. No. 5,550,066. Typically, each display sub-pixel is controlled by one control element, and each control element includes at least one transistor. For example, in a simple active-matrix organic light-emitting diode (OLED) display, each control element includes two transistors (a select transistor and a power transistor) and one capacitor for storing a charge specifying the luminance of the sub-pixel. Each OLED element employs an independent control electrode connected to the power transistor and a common electrode. In contrast, an LCD typically uses a single transistor to control each pixel. Control of the light-emitting elements is usually provided through a data signal line, a select signal line, a power connection and a ground connection. Active-matrix elements are not necessarily limited to displays and can be distributed over a substrate and employed in other applications requiring spatially distributed control. Active-matrix circuits are commonly constructed with thin-film transistors (TFTs) in a semiconductor layer formed over a display substrate and employing a separate TFT circuit to control each light-emitting pixel in the display. The semiconductor layer is typically amorphous silicon or poly-crystalline silicon and is distributed over the entire flat-panel display substrate. The semiconductor layer is photolithographically processed to form electronic control elements, such as transistors and capacitors. Additional layers, for example insulating dielectric layers and conductive metal layers are provided, often by evaporation or sputtering, and photolithographically patterned to form electrical interconnections, or wires. Active-matrix circuits are also constructed using active components transferred from one substrate to another, for example as described in U.S. Pat. No. 8,722,458 referenced above and AMOLED Displays using Transfer-Printed Integrated Circuits published in the Proceedings of the 2009 Society for Information Display International Symposium Jun. 2-5, 2009, in San Antonio Tex., US, vol. 40, Book 2, ISSN 0009-0966X, paper 63.2 p. 947. In this approach, small integrated circuits