US-12628655-B2 - Method for selectively forming a shielding layer on a semiconductor device

US12628655B2US 12628655 B2US12628655 B2US 12628655B2US-12628655-B2

Abstract

A method for selectively forming a shielding layer on a semiconductor device comprises: attaching a tape stack onto a predetermined area of a substrate of the semiconductor device, wherein the tape stack comprises a lower tape layer that covers the predetermined area and an upper tape layer that extends beyond the predetermined area and overhangs above an intermediate area adjacent to the predetermined area; applying a shielding layer to the substrate of the semiconductor device; and removing the tape stack and a portion of the shielding layer formed on the tape stack from the substrate of the semiconductor device.

Inventors

Seonghwan Park
Bom Lee
KyoungHee Park

Assignees

STATS ChipPAC Pte. Ltd.

Dates

Publication Date: 20260512
Application Date: 20230510
Priority Date: 20220518

Claims (12)

1 . A method for selectively forming a shielding layer on a semiconductor device, the method comprising: attaching a tape stack onto a predetermined area of a substrate of the semiconductor device, wherein the tape stack comprises a lower tape layer that covers the predetermined area and an upper tape layer that extends beyond the predetermined area and overhangs above an intermediate area adjacent to the predetermined area; applying a shielding layer to the substrate of the semiconductor device; and removing the tape stack and a portion of the shielding layer formed on the tape stack from the substrate of the semiconductor device.
2 . The method of claim 1 , wherein each of the lower tape layer and the upper tape layer comprises a base film and an adhesive layer.
3 . The method of claim 1 , wherein attaching a tape stack onto a predetermined area of a substrate of the semiconductor device comprises: attaching the lower tape layer onto the predetermined area of the substrate of the semiconductor device; and attaching the upper tape layer onto the lower tape layer.
4 . The method of claim 1 , wherein attaching a tape stack onto a predetermined area of a substrate of the semiconductor device comprises: attaching the lower tape layer and the upper tape layer together to form the tape stack; and attaching the formed tape stack onto the predetermined area of the substrate of the semiconductor device.
5 . The method of claim 1 , wherein an conductive pattern is disposed on the predetermined area of the semiconductor device, and the tape stack covers the conductive pattern.
6 . The method of claim 5 , wherein one or more electronic components encapsulated by an encapsulant are disposed on a shielding area of the substrate of the semiconductor device, the shielding area being spaced from the predetermined area by the intermediate area, and wherein the shielding layer is applied to a surface of the encapsulant.
7 . The method of claim 1 , wherein a ratio between a width of the upper tape layer overhanging above the intermediate area and a width of the lower tape layer is 0.02 to 0.05.
8 . The method of claim 1 , a ratio between a width of the upper tape layer overhanging above the intermediate area and a total width of the upper tape layer is 0.02 to 0.05.
9 . The method of claim 1 , wherein a ratio between a height of the lower tape layer and a height of the upper tape layer is 1 to 3.
10 . The method of claim 1 , wherein a ratio between a width of the upper tape layer overhanging above the intermediate area and a height of the lower taper layer is from 0.5 to 5.
11 . The method of claim 10 , wherein the conductive material comprises at least one of the following: Al, Cu, Sn, Ni, Au, Ag or any combination thereof.
12 . The method of claim 1 , wherein applying a shielding layer to the substrate of the semiconductor device comprises sputtering a conductive material to the substrate of the semiconductor device.

Description

TECHNICAL FIELD The present application generally relates to semiconductor packaging technology, and more particularly, to a method for selectively forming a shielding layer on a semiconductor device. BACKGROUND OF THE INVENTION The semiconductor industry is constantly faced with complex integration challenges as consumers want their electronic products to be lighter, smaller and have higher performance with more and more functionalities. One of the solutions is System-in-Package (SiP). SiP is a functional electronic system or sub-system that includes in a single package two or more heterogeneous semiconductor die, such as a logic chip, a memory, integrated passive devices (IPD), RF filters, sensors, heat sinks, or antennas. A problem in which interference such as electromagnetic interference (EMI) between the components in one module or other modules may occur. Typically, a semiconductor device may be provided with a metal cover or a uniformly spread coating around its outer periphery as a shielding layer. However, some components (e.g., antennas) in the semiconductor device are required to be exposed without shielding layer, for example, for connection or transmission purpose. Therefore, a need exists for selectively forming a shielding layer on a semiconductor device. SUMMARY OF THE INVENTION An objective of the present application is to provide a method for selectively forming a shielding layer on a semiconductor device. In an aspect of the present application, a method for selectively forming a shielding layer on a semiconductor device is disclosed. The method comprises: attaching a tape stack onto a predetermined area of a substrate of the semiconductor device, wherein the tape stack comprises a lower tape layer that covers the predetermined area and an upper tape layer that extends beyond the predetermined area and overhangs above an intermediate area adjacent to the predetermined area; applying a shielding layer to the substrate of the semiconductor device; and removing the tape stack and a portion of the shielding layer formed on the tape stack from the substrate of the semiconductor device. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only, and are not restrictive of the invention. Further, the accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain principles of the invention. BRIEF DESCRIPTION OF DRAWINGS The drawings referenced herein form a part of the specification. Features shown in the drawing illustrate only some embodiments of the application, and not of all embodiments of the application, unless the detailed description explicitly indicates otherwise, and readers of the specification should not make implications to the contrary. FIG. 1 is a schematic diagram showing an example of a semiconductor device according to an embodiment of the present application. FIG. 2A-2C are schematic diagrams showing a conventional method for selectively forming a shielding layer on a semiconductor device. FIG. 3A-3D are schematic diagrams showing a method for selectively forming a shielding layer on a semiconductor device according to an embodiment of the present application. FIG. 4 is a flowchart illustrating a method for selectively forming a shielding layer on a semiconductor device according to an embodiment of the present application. FIG. 5 is a flowchart illustrating a method for selectively forming a shielding layer on a semiconductor device according to another embodiment of the present application. The same reference numbers will be used throughout the drawings to refer to the same or like parts. DETAILED DESCRIPTION OF THE INVENTION The following detailed description of exemplary embodiments of the application refers to the accompanying drawings that form a part of the description. The drawings illustrate specific exemplary embodiments in which the application may be practiced. The detailed description, including the drawings, describes these embodiments in sufficient detail to enable those skilled in the art to practice the application. Those skilled in the art may further utilize other embodiments of the application, and make logical, mechanical, and other changes without departing from the spirit or scope of the application. Readers of the following detailed description should, therefore, not interpret the description in a limiting sense, and only the appended claims define the scope of the embodiment of the application. In this application, the use of the singular includes the plural unless specifically stated otherwise. In this application, the use of “or” means “and/or” unless stated otherwise. Furthermore, the use of the term “including” as well as other forms such as “includes” and “included” is not limiting. In addition, terms such as “element” or “component” encompass