US-12628663-B2 - Lead frame, method of making lead frame, semiconductor apparatus, and method of making semiconductor apparatus

US12628663B2US 12628663 B2US12628663 B2US 12628663B2US-12628663-B2

Abstract

A lead frame including a die pad having a first surface and a second surface opposite the first surface, a lead having a third surface flush with the first surface and a fourth surface opposite the third surface, and a link portion connecting the die pad and the lead, wherein the link portion includes a first portion that surrounds the die pad between the die pad and the lead in a plan view, wherein the first portion has a fifth surface flush with the first surface and the third surface, and has a sixth surface opposite the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, and wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface.

Inventors

Shintaro Hayashi

Assignees

SHINKO ELECTRIC INDUSTRIES CO., LTD.

Dates

Publication Date: 20260512
Application Date: 20221206
Priority Date: 20211222

Claims (3)

1 . A lead frame strip including a plurality of discrete separation areas for singulation, comprising: a die pad portion having a first surface and a second surface opposite to the first surface; a lead portion having both a third surface flush with the first surface and a fourth surface opposite to the third surface; a link portion connecting the die pad portion and the lead portion together; a section bar surrounding the die pad portion, the lead portion, and the link portion in a plan view; and plating lead portions connecting the section bar to the lead portion and the die pad portion, wherein the link portion includes a first portion that surrounds the die pad portion between the die pad portion and the lead portion in the plan view, wherein the first portion has a fifth surface flush with both the first surface and the third surface, and has a sixth surface opposite to the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface, and wherein each point between the die pad portion and the section bar is occupied by the lead portion, the link portion, or one of the plating lead portions, and no vacant through hole exists in any area that is surrounded by the section bar in the plan view.
2 . The lead frame according to claim 1 , comprising a plurality of said lead portions, wherein the link portion includes a second portion situated between two lead portions, among the plurality of said lead portions, adjacent to each other in the plan view, wherein the second portion has a seventh surface flush with both the first surface and the third surface, and has an eighth surface opposite to the seventh surface, and wherein the eighth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface.
3 . The lead frame according to claim 1 , further comprising a plating layer disposed on the fourth surface.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The present application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2021-208309 filed on Dec. 22, 2021, with the Japanese Patent Office, the entire contents of which are incorporated herein by reference. FIELD The present disclosures relate to lead frames, methods of making a lead frame, semiconductor apparatuses, and methods of making a semiconductor apparatus. BACKGROUND There is a demand for thin semiconductor apparatuses having a lead frame. It is conceivable to reduce the thickness of a semiconductor apparatus by reducing the thickness of a lead frame. However, reducing the thickness of a lead frame likely causes the lead frame to be deformed at the time of mounting a semiconductor device or at the time of encapsulation with an encapsulation resin. It is an object of the present disclosure to provide a lead frame, a method of manufacturing a lead frame, a semiconductor apparatus, and a method of manufacturing a semiconductor apparatus by which the thickness of the semiconductor apparatus is reduced while reducing deformation of the lead frame. PRIOR ART DOCUMENT [Patent Document] [Patent Document 1] Japanese Laid-Open Patent Publication No. 2012-69886[Patent Document 2] Japanese Laid-Open Patent Publication No. 2011-29335 SUMMARY According to an embodiment of the present disclosure, a lead frame includes a die pad portion having a first surface and a second surface opposite to the first surface, a lead portion having both a third surface flush with the first surface and a fourth surface opposite to the third surface, and a link portion connecting the die pad portion and the lead portion together, wherein the link portion includes a first portion that surrounds the die pad portion between the die pad portion and the lead portion in a plan view, wherein the first portion has a fifth surface flush with both the first surface and the third surface, and has a sixth surface opposite to the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, and wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface. The object and advantages of the embodiment will be realized and attained by means of the elements and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a drawing illustrating an outline of a lead frame according to a first embodiment; FIG. 2 is an enlarged top view of part of what is illustrated in FIG. 1; FIGS. 3A and 3B are cross-sectional views illustrating the lead frame according to the first embodiment; FIGS. 4A and 4B are drawings illustrating a method of making the lead frame according to the first embodiment; FIGS. 5A and 5B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 6A and 6B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 7A and 7B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 8A and 8B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 9A and 9B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 10A and 10B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 11A and 11B are drawings illustrating the method of making the lead frame according to the first embodiment; FIGS. 12A and 12B are drawings illustrating the method of making the lead frame according to the first embodiment; FIG. 13 is a top view illustrating an example of a dummy pattern; FIGS. 14A through 14C are cross-sectional views illustrating a method of making a semiconductor apparatus using the lead frame according to the first embodiment; FIGS. 15A through 15C are cross-sectional views illustrating the method of making a semiconductor apparatus using the lead frame according to the first embodiment; FIGS. 16A and 16B are cross-sectional views illustrating the method of making a semiconductor apparatus using the lead frame according to the first embodiment; FIG. 17 is an enlarged top view illustrating part of a lead frame according to a second embodiment. FIGS. 18A and 18B are cross-sectional views illustrating the lead frame according to the second embodiment. FIGS. 19A and 19B are drawings illustrating a method of making the lead frame according to the second embodiment; and FIGS. 20A and 20B are drawings illustrating the method of making the lead frame according to the second embodiment. DESCRIPTIO