US-12628665-B2 - Semiconductor device

US12628665B2US 12628665 B2US12628665 B2US 12628665B2US-12628665-B2

Abstract

A semiconductor device can include: a semiconductor chip including a first and second surface, a first electrode on the first surface, an active area on the second surface, a second electrode on the second surface, and a third electrode on the second surface; a first conductive member in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductive member in a second area and isolated from the first conductive member, the second area an area in which, when viewed from above, with respect to a first area of the active area in which the first conductive member is not provided, circles sharing centers of shortest distances between an outer periphery of the first conductive member and an outer periphery of the active area can be drawn largest in the first area; and a lead terminal connected to the first conductive member.

Inventors

Taira Tabakoya
Toshihiro TSUJIMURA

Assignees

KABUSHIKI KAISHA TOSHIBA
TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

Dates

Publication Date: 20260512
Application Date: 20230228
Priority Date: 20220922

Claims (6)

1 . A semiconductor device comprising: a semiconductor chip comprising: a first surface, a second surface different from the first surface, the second surface comprising an active area comprising a first area and a second area in the first area, a first electrode provided on the first surface, a second electrode provided on the second surface, and a third electrode provided on the second surface; a first conductor provided in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductor provided in the second area and isolated from the first conductor, when viewed from above, the second area being an area in which the first conductor is not provided, the second area being a portion of the first area having an area for circles with larger diameters between an outer periphery of the first conductor and an outer periphery of the active area compared to circles drawn in the first area between the outer periphery of the first conductor and the outer periphery of the active area; a lead terminal connected to the first conductor; an insulating film provided above the second electrode and having a first opening; and a first connector provided in the first opening and connecting the first conductor and the semiconductor chip, wherein the insulating film further has a second opening, and the second conductor is connected to the second electrode via a second connector in the second opening.
2 . The semiconductor device according to claim 1 , wherein the second conductor is connected to the first connector.
3 . The semiconductor device according to claim 1 , wherein the first connector has a void.
4 . A semiconductor device comprising: a semiconductor chip comprising: a first surface, a second surface different from the first surface, the second surface comprising an active area comprising a first area and a second area in the first area, a first electrode provided on the first surface, a second electrode provided on the second surface, and a third electrode provided on the second surface; a first conductor provided in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductor provided in the second area and isolated from the first conductor, when viewed from above, the second area being an area in which the first conductor is not provided, the second area being a portion of the first area having an area for circles with larger diameters between an outer periphery of the first conductor and an outer periphery of the active area compared to circles drawn in the first area between the outer periphery of the first conductor and the outer periphery of the active area; a lead terminal connected to the first conductor; and a third conductor provided in the second area in a manner of being isolated from the first conductor and the second conductor, wherein when viewed from above, the first conductor is provided between the second conductor and the third electrode and between the third conductor and the third electrode, and the second conductor and the third conductor are provided symmetrically with respect to a third plane passing through the third electrode and perpendicular to the first surface.
5 . The semiconductor device according to claim 4 , wherein when viewed from above, the active area has a U-shape or a squared U-shape, and when viewed from above, the third electrode is provided inside the U-shape or the squared U-shape of the active area.
6 . The semiconductor device according to claim 4 , wherein when viewed from above, the first conductor has a U-shape or a squared U-shape, the second conductor and the third conductor are provided outside the U-shape or the squared U-shape of the first conductor, and the third electrode is provided inside the U-shape or the squared U-shape of the first conductor.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S) This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2022-151661, filed Sep. 22, 2022, the entire contents of which are incorporated herein by reference. FIELD Embodiments described herein relate generally to a semiconductor device. BACKGROUND A semiconductor device including a semiconductor chip such as a metal oxide semiconductor field effect transistor (MOSFET) is used for power conversion or the like. For example, when the above semiconductor device is a vertical MOSFET, a source electrode and a gate electrode provided on an upper surface of the semiconductor chip are respectively connected to connectors provided above the semiconductor chip. Examples of related art include JP-A-2019-197842. DESCRIPTION OF THE DRAWINGS FIGS. 1A, 1B and 1C are schematic views of a semiconductor device according to a first embodiment. FIG. 2 is a schematic view of the semiconductor device according to the first embodiment. FIG. 3 is a schematic view illustrating an upper surface of the semiconductor chip according to the first embodiment. FIGS. 4A and 4B are schematic views of the semiconductor device according to the first embodiment. FIG. 5 is a schematic view of a semiconductor device according to another aspect of the first embodiment. FIG. 6 is a schematic view of a semiconductor device according to another aspect of the first embodiment. FIGS. 7A and 7B are schematic views of the semiconductor device according to the first embodiment. FIG. 8 is a schematic view of a semiconductor device according to another aspect of the first embodiment. FIGS. 9A and 9B are schematic top views illustrating examples of an insulating film according to the first embodiment. FIG. 10 is a schematic view of a semiconductor device according to a second embodiment. FIG. 11 is a schematic view of a semiconductor device according to a third embodiment. FIG. 12 is a schematic view of a semiconductor device according to a fourth embodiment. FIG. 13 is a schematic view of a semiconductor device according to a fifth embodiment. DETAILED DESCRIPTION Embodiments provide a semiconductor device that has a wide safe operation area and that has high reliability. In general, according to one embodiment, a semiconductor device according to an embodiment includes: a semiconductor chip including a first surface, a second surface, a first electrode provided on the first surface, an active area provided on the second surface, a second electrode provided on the second surface, and a third electrode provided on the second surface; a first conductive member provided in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductive member provided in a second area in a manner of being isolated from the first conductive member, the second area being an area in which, when viewed from above, with respect to a first area of the active area in which the first conductive member is not provided, circles sharing centers of shortest distances between an outer periphery of the first conductive member and an outer periphery of the active area can be drawn largest in the first area; and a lead terminal connected to the first conductive member. Hereinafter, the embodiments will be described with reference to the drawings. In the following description, the same members or the like are denoted by the same reference numerals, and description of members or the like once described may be omitted as appropriate. In the present description, in order to indicate a positional relationship between components and the like, an upward direction in the drawings is described as “upper”, and a downward direction in the drawings is described as “lower”. In the present description, concepts of “upper” and “lower” are not necessarily terms indicating a relation with a direction of gravity. First Embodiment A semiconductor device according to the present embodiment includes: a semiconductor chip including a first surface, a second surface, a first electrode provided on the first surface, an active area provided on the second surface, a second electrode provided on the second surface, and a third electrode provided on the second surface; a first conductive member provided in the active area of the semiconductor chip and electrically connected to the semiconductor chip; a second conductive member provided in a second area in a manner of being isolated from the first conductive member, the second area being an area in which, when viewed from above, with respect to a first area of the active area in which the first conductive member is not provided, circles sharing centers of shortest distances between an outer periphery of the first conductive member and an outer periphery of the active area can be drawn largest in the first area; and a lead terminal connected to the first conductive member. Further, the semiconductor device according to the present emb