US-12628688-B2 - Power semiconductor module arrangement and housing for a power semiconductor module arrangement

US12628688B2US 12628688 B2US12628688 B2US 12628688B2US-12628688-B2

Abstract

A power semiconductor module arrangement includes a housing, at least one substrate arranged inside the housing and including a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer, and a heat sink or base plate. The housing includes sidewalls and a cover and is attached to the heat sink or base plate. The sidewalls exert pressure on the at least one substrate such that the at least one substrate is pressed onto the heat sink or base plate. The cover exerts pressure on the sidewalls such that the sidewalls are pressed onto the at least one substrate. The housing further includes at least one press-on element arranged between and directly adjoining the sidewalls and the cover, wherein each of the at least one press-on element is compressed by the pressure that is exerted on the sidewalls by the cover.

Inventors

Thomas Herbst

Assignees

INFINEON TECHNOLOGIES AG

Dates

Publication Date: 20260512
Application Date: 20220406
Priority Date: 20210407

Claims (15)

1 . A power semiconductor module arrangement, comprising: a housing; at least one substrate arranged inside the housing and comprising a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer; and a heat sink or base plate, wherein: the housing comprises sidewalls and a cover; the housing is attached to the heat sink or base plate; the sidewalls of the housing exert pressure on the at least one substrate such that the at least one substrate is pressed onto the heat sink or base plate; the cover exerts pressure on the sidewalls such that the sidewalls are pressed onto the at least one substrate; the housing further comprises at least one press-on element arranged between and directly adjoining the sidewalls and the cover; and each of the at least one press-on element is compressed by the pressure that is exerted on the sidewalls by the cover.
2 . The power semiconductor module arrangement of claim 1 , wherein the sidewalls form a closed frame extending along an outer circumference of the at least one substrate, and wherein the power semiconductor module arrangement comprises one press-on element extending continuously around the entire circumference of the frame formed by the sidewalls.
3 . The power semiconductor module arrangement of claim 1 , wherein the sidewalls form a closed frame extending along an outer circumference of the at least one substrate, and wherein the power semiconductor module arrangement comprises two or more press-on elements evenly distributed along the circumference of the frame formed by the sidewalls.
4 . The power semiconductor module arrangement of claim 1 , wherein each of the at least one press-on element is configured to transfer a force of between 1 N and 100 N from the cover to the sidewalls.
5 . The power semiconductor module arrangement of claim 1 , wherein each of the at least one press-on element is firmly or detachably attached either to the sidewalls, or to the cover.
6 . The power semiconductor module arrangement of claim 1 , wherein the at least one press-on element has a hardness of between 15 Shore A and 100 Shore A.
7 . The power semiconductor module arrangement of claim 1 , wherein the at least one press-on element comprises at least one of a thermoplastic elastomer, silicone, and rubber.
8 . The power semiconductor module arrangement of claim 7 , wherein the at least one press-on element comprises ethylene propylene diene monomer rubber (EPDM), ethylene acrylic rubber (AEM), acrylic rubber or alkyl acrylate copolymer (ACM), fluorine rubber or fluorocarbon (FKM), silicone rubber or vinyl methyl silicone (VMQ), fluorosilicone rubber or fluorovinylmethylsiloxane rubber (FVMQ), phenyl methyl silicone rubber (PVMQ), or a perfluoroelastomeric compound having a higher amount of fluorine than FKM (FFKM).
9 . The power semiconductor module arrangement of claim 1 , wherein the at least one press-on element is injection molded on the sidewalls or the cover.
10 . The power semiconductor module arrangement of claim 1 , wherein either the at least one press-on element is glued to the sidewalls or the cover, or each of the at least one press-on element is inserted into a corresponding slot or cavity formed in the sidewalls or in the cover.
11 . The power semiconductor module arrangement of claim 1 , wherein each of the at least one press-on element comprises a structural shape that is configured to be bent or distorted under pressure.
12 . The power semiconductor module arrangement of claim 11 , wherein each of the at least one press-on element comprises a base section and an arch-shaped section coupled to the base section, and wherein a first end of the arch-shaped section is coupled to a first end of the base section, a second end of the arch-shaped section is coupled to a second end of the base section, and a middle section of the arch-shaped section extends and forms an arch between the first end and the second end.
13 . The power semiconductor module arrangement of claim 11 , wherein each of the at least one press-on element comprises a base section, and a first curved brace extending from a first end of the base section towards a second curved brace, and wherein the second curved brace extends from a second end of the base section towards the first curved brace.
14 . A method, comprising: arranging at least one substrate on a heat sink or base plate, wherein each of the at least one substrate comprises a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer; arranging a housing on the heat sink or base plate, wherein the housing comprises sidewalls, a cover, and at least one press-on element, wherein arranging the housing on the heat sink or base plate comprises: arranging the sidewalls on the at least one substrate such that the sidewalls extend along an outer circumference of the at least one substrate; arranging the cover on the sidewalls such that the at least one press-on element is arranged between and directly adjoins the sidewalls and the cover; and attaching the housing to the heat sink or base plate, wherein when the housing is attached to the heat sink or base plate, the sidewalls of the housing exert pressure on the at least one substrate such that the at least one substrate is pressed onto the heat sink or base plate, the cover exerts pressure on the sidewalls such that the sidewalls are pressed onto the at least one substrate, and each of the at least one press-on element is compressed by the pressure that is exerted on the sidewalls by the cover.
15 . A housing, comprising: sidewalls; a cover; and at least one press-on element arranged between and directly adjoining the sidewalls and the cover, wherein each of the at least one press-on element is compressed when pressure is exerted on the sidewalls by the cover.

Description

TECHNICAL FIELD The instant disclosure relates to a power semiconductor module arrangement and to a housing for a power semiconductor module arrangement, in particular to a power semiconductor module arrangement including a housing that comprises several parts. BACKGROUND Power semiconductor module arrangements often include one or more substrates within a housing. Each substrate usually comprises a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer and, optionally, a second metallization layer deposited on a second side of the substrate layer. A semiconductor arrangement including one or more controllable semiconductor elements (e.g., two IGBTs in a half-bridge configuration) may be arranged on the at least one substrate. The housing often comprises several separate pails such as sidewalls and a cover. The at least one substrate can be arranged on a heat sink, and the sidewalls of the housing can press the at least one substrate onto the heatsink to provide optimal heat dissipation. The sidewalls can be attached to the heatsink, e.g., by means of screws or other suitable connection elements. The cover of the housing is mounted onto the sidewalls and connected to the heatsink, thereby pressing the sidewalls and the at least one substrate arranged in the housing onto the heatsink. There is a risk, however, that the forces that are exerted on the sidewalls and on the at least one substrate are distributed unequally. This may negatively affect the heat dissipation. There is a need for a power semiconductor module arrangement and a housing for a power semiconductor module arrangement that provide a homogenous distribution of the forces exerted on the sidewalls of the housing and on the at least one substrate that is arranged inside the housing. SUMMARY A power semiconductor module arrangement includes a housing, at least one substrate arranged inside the housing and including a dielectric insulation layer, and a first metallization layer arranged on a first side of the dielectric insulation layer, and a heat sink or base plate, wherein the housing includes sidewalls and a cover, the housing is attached to the heat sink or base plate, the sidewalls of the housing exert pressure on the at least one substrate, thereby pressing the at least one substrate onto the heat sink or base plate, the cover exerts pressure on the sidewalk, thereby pressing the sidewalls onto the at least one substrate, and the housing further includes at least one press-on element arranged between and directly adjoining the sidewalls and the cover, wherein each of the at least one press-on element is compressed by the pressure that is exerted on the sidewalls by the cover. A method includes arranging at least one substrate on a heat sink or base plate, wherein each of the at least one substrate includes a dielectric insulation layer, and a first metallization layer arranged on a first side of the dielectric insulation layer, arranging a housing on the at least one substrate, wherein the housing includes sidewalk, a cover, and at least one press-on element, and wherein arranging the housing on the at least one substrate includes arranging the sidewalk on the at least one substrate such that the sidewalls extend along an outer circumference of the at least one substrate, arranging the cover on the sidewalks such that the at least one press-on element is arranged between and directly adjoins the sidewalk and the cover, and attaching the housing to the heat sink or base plate, wherein, when the housing is attached to the heat sink or base plate, the sidewalk of the housing exert pressure on the at least one substrate, thereby pressing the at least one substrate onto the heat sink or base plate, the cover exerts pressure on the sidewalk, thereby pressing the sidewalls onto the at least one substrate, and each of the at least one press-on element is compressed by the pressure that is exerted on the sidewalls by the cover. A housing includes sidewalls, a cover, and at least one press-on element arranged between and directly adjoining the sidewalk and the cover, wherein each of the at least one press-on element is compressed when pressure s exerted on the sidewalls by the cover. The invention may be better understood with reference to the following drawings and the description. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like referenced numerals designate corresponding parts throughout the different views. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a power semiconductor module arrangement. FIG. 2 is a three-dimensional view of another power semiconductor module arrangement in an unmounted state. FIG. 3 is a three-dimensional view of the power semiconductor module arrangement of FIG. 2 in a mounted state. FIG. 4 is a three-dimensional vi