US-12628707-B2 - Semiconductor package and method of manufacturing the semiconductor package

Abstract

A semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, and including a plurality of bonding pads exposed to the first surface and a plurality of solder bumps respectively disposed on the bonding pads, and at least one semiconductor device arranged on the package substrate. Each of the solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided inside the bump body to be adjacent to the bonding pad, and a first metal compound layer provided to surround the bonding particles and having a protrusion structure for strengthening adhesion with the bonding pad.

Inventors

• Byungwook Kim
• Ayoung KIM
• Seongwon JEONG
• SANGSU HA

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260512

Application Date

20220513

Priority Date

20211025

Claims (20)

1. 1 . A semiconductor package, comprising: a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a plurality of bonding pads exposed from the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads; and at least one semiconductor device arranged on the package substrate, wherein each of the plurality of solder bumps includes: a bump body disposed on the bonding pad; a plurality of bonding particles provided inside the bump body to be adjacent to the bonding pad; and a first metal compound layer provided to surround the plurality of bonding particles, the first metal compound layer having a protrusion structure for strengthening adhesion with the bonding pad, and wherein, in each of the plurality of solder bumps, a density of the plurality of bonding particles is greater in a region of the solder bump adjacent to the bonding pad than in a region near a center of the solder bump.
2. 2 . The semiconductor package of claim 1 , wherein the package substrate further includes redistribution wirings that electrically connect the semiconductor device to the bonding pads.
3. 3 . The semiconductor package of claim 1 , wherein each of the plurality of solder bumps further includes a second metal compound layer provided along a boundary between the bonding pad and the bump body for strengthening adhesion.
4. 4 . The semiconductor package of claim 1 , wherein the bump body has a first diameter, wherein each of the plurality of bonding particles has a second diameter, and wherein a ratio of the second diameter to the first diameter is within a range of 0.005 to 0.15.
5. 5 . The semiconductor package of claim 1 , wherein a distance between the plurality of bonding particles and the bonding pad is within a range of 0.1 μm to 30 μm.
6. 6 . The semiconductor package of claim 1 , wherein the bonding pad includes a first metal material, wherein the bump body includes a second metal material different from the first metal material, and wherein the plurality of bonding particles include a third metal material different from the second metal material.
7. 7 . The semiconductor package of claim 6 , wherein the first metal material includes at least one of copper (Cu), aluminum (Al), and titanium (Ti).
8. 8 . The semiconductor package of claim 6 , wherein the second metal material includes at least one of nickel (Ni), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn).
9. 9 . The semiconductor package of claim 6 , wherein the third metal material includes at least one of nickel (Ni), antimony (Sb), bismuth (Bi), zinc (Zn), indium (In), palladium (Pd), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn).
10. 10 . The semiconductor package of claim 1 , wherein the plurality of solder bumps include tin (Sn), wherein the plurality of bonding particles include nickel (Ni), and wherein the first metal compound layer includes (Cu, Ni) 6 Sn 5 .
11. 11 . A semiconductor package, comprising: a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a redistribution wiring layer having redistribution wiring therein, a plurality of bonding pads exposed from the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads; and first and second semiconductor devices arranged on the second surface of the package substrate to be spaced apart from each other, wherein each of the plurality of solder bumps includes: a bump body disposed on the bonding pad; a plurality of bonding particles provided adjacent to the bonding pad; and a first metal compound layer provided to surround the plurality of bonding particles, the first metal compound layer having a protrusion structure for strengthening adhesion with the bonding pad, and wherein, in each of the plurality of solder bumps, a density of the plurality of bonding particles is greater in a region of the solder bump adjacent to the bonding pad than in a region near a center of the solder bump.
12. 12 . The semiconductor package of claim 11 , wherein each of the plurality of solder bumps further includes a second metal compound layer provided along a boundary between the bonding pad and the solder bump for strengthening adhesion.
13. 13 . The semiconductor package of claim 11 , wherein the bump body has a first diameter, wherein each of the plurality of bonding particles has a second diameter, and wherein a ratio of the second diameter to the first diameter is within a range of 0.005 to 0.15.
14. 14 . The semiconductor package of claim 11 , wherein a distance between the plurality of bonding particles and the bonding pad is within a range of 0.1 μm to 30 μm.
15. 15 . The semiconductor package of claim 11 , wherein the plurality of bonding pads include a first metal material, wherein the bump body includes a second metal material different from the first metal material, and wherein the plurality of bonding particles include a third metal material different from the second metal material.
16. 16 . The semiconductor package of claim 15 , wherein the first metal material includes at least one of copper (Cu), aluminum (Al), and titanium (Ti).
17. 17 . The semiconductor package of claim 15 , wherein the second metal material includes at least one of nickel (Ni), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn).
18. 18 . The semiconductor package of claim 15 , wherein the third metal material includes at least one of nickel (Ni), antimony (Sb), bismuth (Bi), zinc (Zn), indium (In), palladium (Pd), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), chromium (Cr), and tin (Sn).
19. 19 . The semiconductor package of claim 11 , wherein the plurality of solder bumps include tin (Sn), wherein the plurality of bonding particles include nickel (Ni), and wherein the first metal compound layer includes (Cu, Ni) 6 Sn 5 .
20. 20 . A semiconductor package, comprising: a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a redistribution wiring layer having redistribution wiring therein, a plurality of bonding pads exposed from the first surface, and a plurality of solder bumps respectively disposed on the plurality of bonding pads; and first and second semiconductor devices arranged on the second surface of the package substrate, wherein each of the plurality of solder bumps includes: a bump body disposed on the bonding pad; a plurality of bonding particles provided adjacent to the bonding pad; a first metal compound layer provided to surround the plurality of bonding particles; and a second metal compound layer provided to be in contact with the bonding pad, wherein the first metal compound layer includes (Cu, Ni) 6 Sn 5 , wherein, in each of the plurality of solder bumps, a density of the plurality of bonding particles is greater in a region of the solder bump adjacent to the bonding pad than in a region near a center of the solder bump, and wherein the first and second metal compound layers include a protrusion structure for strengthening adhesion between the plurality of bonding pads and the plurality of solder bumps.

Description

PRIORITY STATEMENT This application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2021-0142824, filed on Oct. 25, 2021, in the Korean Intellectual Property Office (KIPO), the contents of which are herein incorporated by reference in its entirety. BACKGROUND 1. Field Example embodiments relate to a semiconductor package and a method of manufacturing the semiconductor package. More particularly, example embodiments relate to a semiconductor package including a plurality of different semiconductor devices stacked on a package substrate and a method of manufacturing the same. 2. Description of the Related Art A package substrate includes solder bumps that are bonded to bonding pads (under bump metallurgy) to be electrically connected to semiconductor devices stacked on the package substrate. The solder bump and the bonding pad may include different materials to each other, and an adhesive strength may vary depending on a composition of an intermetallic compound (IMC) formed between the solder bump and the bonding pad in manufacturing processes. When the adhesive strength between the solder bump and the bonding pad is weak, the solder bump may be separated from the package substrate, and thus, the function of the package substrate may not be properly performed and reliability may be reduced. SUMMARY Example embodiments provide a semiconductor package including a package substrate having a solder bump structure capable of improving adhesion. Example embodiments provide a method of manufacturing the semiconductor package. According to example embodiments, a semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a plurality of bonding pads exposed from the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads and at least one semiconductor device arranged on the package substrate. Each of the plurality of solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided inside the bump body to be adjacent to the bonding pad, and a first metal compound layer provided to surround the plurality of bonding particles, the first metal compound layer having a protrusion structure for strengthening adhesion with the bonding pad. According to example embodiments, a semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a redistribution wiring layer having redistribution wiring therein, a plurality of bonding pads exposed from the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads and first and second semiconductor devices arranged on the second surface of the package substrate to be spaced apart from each other. Each of the plurality of solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided adjacent to the bonding pad, and a first metal compound layer provided to surround the plurality of bonding particles, the first metal compound layer having a protrusion structure for strengthening adhesion with the bonding pad. According to example embodiments, a semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a redistribution wiring layer having redistribution wiring therein, a plurality of bonding pads exposed from the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads, and first and second semiconductor devices arranged on the second surface of the package substrate. Each of the plurality of solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided adjacent to the bonding pad, a first metal compound layer provided to surround the bonding particles, and a second metal compound layer provided in contact with the bonding pad. The first and second metal compound layers include a protrusion structure for strengthening adhesion between the plurality of bonding pads and the plurality of solder bumps. According to example embodiments, a semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, the package substrate including a plurality of bonding pads exposed to the first surface and a plurality of solder bumps respectively disposed on the plurality of bonding pads, and at least one semiconductor device arranged on the package substrate, wherein each of the plurality of solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided inside the bump body to be adjacent to the bonding pad, and a first metal compound layer provided to surround the plurality of bonding particles and having a protrusion structure for streng