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US-12628711-B2 - Integrated circuit package, electronic device including the same, and manufacturing method thereof

US12628711B2US 12628711 B2US12628711 B2US 12628711B2US-12628711-B2

Abstract

Various embodiments of the disclosure relate to an integrated circuit package, an electronic device including same, and a manufacturing method therefor, the method comprising: attaching at least one first element to a first surface of a substrate; molding the first surface using a first mold; grinding the first mold; attaching at least one second element and at least one connection member comprising a conductive material to a second surface of the substrate; and attaching an interposer substrate including landing pads for an electrical connection with a printed circuit board included in an electronic device to the second surface of the substrate.

Inventors

  • Taeyang NA
  • Kicheol BAE
  • Chulwoo PARK

Assignees

  • SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date
20260512
Application Date
20221129
Priority Date
20210409

Claims (14)

  1. 1 . An electronic device comprising: a printed circuit board; and an integrated circuit package attached to the printed circuit board, wherein the integrated circuit package includes: a substrate on which a plurality of elements are attached to a first surface and a second surface opposite to the first surface; a first mold covering the first surface of the substrate; an interposer substrate attached to the second surface of the substrate and including landing pads for an electrical connection with the printed circuit board; and a connection member comprising a conductive material configured to electrically connect the substrate and the interposer substrate, wherein the substrate includes: a first substrate on which the plurality of elements comprise a first arrangement structure; and a second substrate on which the plurality of elements comprise a second arrangement structure different from the first arrangement structure.
  2. 2 . The electronic device of claim 1 , wherein the connection member includes an interposer ball.
  3. 3 . The electronic device of claim 1 , wherein the interposer substrate includes: a first interposer substrate corresponding to the first substrate; and a second interposer substrate corresponding to the second substrate.
  4. 4 . The electronic device of claim 3 , wherein the first interposer substrate and the second interposer substrate include a same arrangement of landing pads, and wherein an electrical connection structure between the first substrate and the first interposer substrate is different from an electrical connection structure between the second substrate and the second interposer substrate.
  5. 5 . The electronic device of claim 1 , the integrated circuit package further includes a second mold positioned between the second surface of the substrate and the interposer substrate and covering the second surface.
  6. 6 . The electronic device of claim 5 , wherein the integrated circuit package further includes a soldering ball provided on the landing pad.
  7. 7 . The electronic device of claim 1 , wherein the integrated circuit package further includes a soldering ball provided on the landing pad.
  8. 8 . An integrated circuit package comprising: a substrate on which a plurality of elements are attached to a first surface and a second surface opposite to the first surface; a first mold covering the first surface of the substrate; an interposer substrate attached to the second surface of the substrate and including landing pads for an electrical connection with a printed circuit board included in an electronic device; and a connection member comprising a conductive material configured to electrically connect the substrate and the interposer substrate, wherein the substrate includes: a first substrate on which the plurality of elements have a first arrangement structure; and a second substrate on which the plurality of elements have a second arrangement structure different from the first arrangement structure.
  9. 9 . The integrated circuit package of claim 8 , wherein the connection member includes an interposer ball.
  10. 10 . The integrated circuit package of claim 8 , wherein the interposer substrate includes: a first interposer substrate corresponding to the first substrate; and a second interposer substrate corresponding to the second substrate.
  11. 11 . The integrated circuit package of claim 10 , wherein the first interposer substrate and the second interposer substrate include a same arrangement of landing pads, and wherein an electrical connection structure between the first substrate and the first interposer substrate is different from an electrical connection structure between the second substrate and the second interposer substrate.
  12. 12 . The integrated circuit package of claim 8 , further comprising a second mold positioned between the second surface of the substrate and the interposer substrate and covering the second surface.
  13. 13 . The integrated circuit package of claim 12 , further comprising a soldering ball provided on the landing pad.
  14. 14 . The integrated circuit package of claim 8 , further comprising a soldering ball provided on the landing pad.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of International Application No. PCT/KR2022/004870 designating the United States, filed on Apr. 5, 2022, in the Korean Intellectual Property Receiving Office and claiming priority to Korean Patent Application No. 10-2021-0046585, filed on Apr. 9, 2021, in the Korean Intellectual Property Office, the disclosures of which are incorporated by reference herein in their entireties. BACKGROUND Field The disclosure relates to an integrated circuit package, an electronic device including the same, and a method for manufacturing the same. Description of Related Art An electronic device (for example, mobile terminal, smartphone, tablet personal computer, or wearable terminal) may provide various functions. For example, the electronic device may provide an image capture function, a music playback function, a navigation function, a telephone call function, a short-range wireless communication (for example, Bluetooth, Wi-Fi, or near field communication (NFC)) function, an electronic payment function, and/or a speech recognition function. The electronic device may include various integrated circuits (ICs) to provide various functions described above. ICs included in the electronic device may be packaged in various manners (for example, ball grid array (BGA), land grid array (LGA)). ICs included in recent electronic devices need to be light, thin, and compact and thus are packaged using a double side mold (DSM) ball grid array (GBA) scheme. In general, processes of the DSM BGA package may include mounting components (for example, ICs, semiconductors) on the first surface (upper surface) of a substrate, molding the first surface to protect the components mounted on the first surface, mounting components and a soldering ball on the second surface (lower surface) of the substrate, molding the second surface, grinding the molding of the second surface, marking product information, exposing the soldering ball to the outside through laser ablation of the molding on the periphery of the soldering ball, performing reballing, performing package sawing, and performing electromagnetic interference (EMI) shielding. However, the DSM BGA package may have a deviation occurring because the molding on the periphery of the soldering ball is not constantly ablated due to deviations of the laser and/or processing errors. If the DSM BGA package is reballed in a state in which the molding is abnormally ablated, the solder ball may be formed in an abnormal shape. If the DSM BGA package is mounted on a PCB in a state in which the solder ball is formed in an abnormal shape, a mounting defect (for example, short defect and/or non-wet (wettability defect)) may occur. Furthermore, when the molding of the lower surface of the DSM BGA package is ground, the components mounted on the lower surface may be exposed to the outside. As a result, a defect (for example, crack) may occur if the components mounted on the lower surface of the substrate receive an external impact. Meanwhile, when an IC having the same function is manufactured by multiple companies, components mounted on the substrate may be arranged differently by respective companies, even in the case of an IC having the same function. In addition, a different component having the same function may be packaged. In this case, respective companies may differently form the ball map of the DSM BGA package. This is because, for example, design of the PCB on which the DSM BGA package is mounted needs to vary in response to the ball map of each DSM BGA package. When an electronic device is manufactured using ICs from multiple companies due to a problem related to part supply or the like, the electronic device manufacturer needs to respectively design and fabricate PCBs included in the electronic device in response to ICs designed by respective companies. SUMMARY Embodiments of the disclosure may provide an integrated circuit package, an electronic device including the same, and a method for manufacturing the same, wherein an interposer substrate may be used to reduce the defect ratio, a pin map (or ball map) may be used in a shared manner, and the packaging size may be reduced. An electronic device according to various example embodiments of the disclosure may include: a printed circuit board; and an integrated circuit package attached to the printed circuit board, wherein the integrated circuit board includes: a substrate on which a plurality of elements are attached to a first surface and a second surface opposite to the first surface; a first mold covering the first surface of the substrate; an interposer substrate attached to the second surface of the substrate and including landing pads for an electrical connection with the printed circuit board; and a connection member comprising a conductive material configured to electrically connect the substrate and the interposer substrate. An integrated circuit package according to v