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US-20260125790-A1 - CONTROLLING ARCING WITH SEASON

US20260125790A1US 20260125790 A1US20260125790 A1US 20260125790A1US-20260125790-A1

Abstract

Methods of season chamber components, methods of processing substrates, and seasoned chamber components are provided. Methods include flowing one or more deposition precursors at a deposition temperature into a substrate processing region of a semiconductor processing chamber housing the semiconductor processing chamber component. Methods include where the substrate processing region includes an electrostatic chuck, and the one or more deposition precursors are generally free of a nitride precursor. Methods include depositing at least a first seasoning layer on the semiconductor processing chamber component, where the at least the first seasoning layer has a thickness of greater than 0.5 μm.

Inventors

  • Allison YAU
  • Shichen Fu
  • Manoj Kumar Jana
  • Zhiling Dun
  • Hang Yu
  • Deenesh Padhi

Assignees

  • APPLIED MATERIALS, INC.

Dates

Publication Date
20260507
Application Date
20241105

Claims (20)

  1. 1 . A method of seasoning a semiconductor processing chamber component comprising: flowing one or more deposition precursors at a deposition temperature into a substrate processing region of a semiconductor processing chamber housing the semiconductor processing chamber component, wherein the substrate processing region includes an electrostatic chuck and wherein the one or more deposition precursors are generally free of a nitride precursor; and depositing at least a first seasoning layer on the semiconductor processing chamber component; wherein the at least the first seasoning layer comprises a thickness of greater than 0.5 μm.
  2. 2 . The method of claim 1 , wherein the semiconductor processing chamber component comprises an electrostatic chuck.
  3. 3 . The method of claim 1 , wherein the one or more deposition precursors comprise a silicon-containing precursor, the silicon-containing precursor comprising silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), silicon tetrachloride (SiCl 4 ), tetraethyl orthosilicate (TEOS), or combinations thereof.
  4. 4 . The method of claim 3 , wherein the one or more deposition precursors comprise an oxygen-containing precursor, the oxygen containing precursor comprising molecular oxygen (O 2 ), ozone (O 3 ), or combinations thereof.
  5. 5 . The method of claim 4 , wherein the one or more deposition precursors comprise tetraethyl orthosilicate and molecular oxygen.
  6. 6 . The method of claim 1 , wherein one or more deposition precursors comprises a silicon-containing precursor and an oxygen-containing precursor, wherein a ratio of the oxygen-containing precursor to the silicon-containing precursor is greater than or about 1:1.
  7. 7 . The semiconductor processing method of claim 1 , wherein the at least a first seasoning layer comprises silicon oxide, and comprises a thickness greater than or about 1 micrometer.
  8. 8 . The semiconductor processing method of claim 7 , wherein the seasoning layer comprises a thickness greater than or about 3.6 micrometers.
  9. 9 . The semiconductor processing method of claim 1 , wherein the deposition temperature is greater than or about 350° C.
  10. 10 . The semiconductor processing method of claim 9 , wherein the deposition temperature is greater than 550° C.
  11. 11 . A substrate support assembly comprising: an electrostatic chuck, wherein at least a portion of the electrostatic chuck comprises a seasoning layer; a support stem coupled to the electrostatic chuck; and an electrode embedded within the electrostatic chuck between a substrate support surface and the support stem; wherein the seasoning layer comprises a thickness greater than 0.5 micrometers and is free of nitride or nitride containing materials.
  12. 12 . The substrate support assembly of claim 11 , wherein the seasoning layer comprises silicon oxide, and comprises a thickness greater than or about 1 micrometer.
  13. 13 . The substrate support assembly of claim 12 , wherein the seasoning layer comprises a thickness greater than or about 3.6 micrometers.
  14. 14 . The substrate support assembly of claim 11 , wherein the support substrate further comprises a heater embedded within the electrostatic chuck.
  15. 15 . The substrate support assembly of claim 11 , wherein the seasoning layer comprises a modulus of greater than or about 50 GPA, a hardness of greater than or about 5 GPA, less than 1 wt. % impurities, or a combination thereof.
  16. 16 . A semiconductor processing method comprising: contacting a semiconductor substrate with an electrostatic chuck in a substrate processing region of a semiconductor processing chamber, wherein the electrostatic chuck has been seasoned with a seasoning layer, wherein the seasoning layer is generally free of nitride or nitride containing materials; applying a chucking voltage to the semiconductor substrate of greater than or about 1.2 kV, and; depositing two or more layers on the chucked substrate, wherein the greater than two layers comprises one or more alternating pairs of oxide and nitride material.
  17. 17 . The semiconductor processing method of claim 16 , wherein the two or more layers comprise an oxide-nitride (ON) stack.
  18. 18 . The semiconductor processing method of claim 16 , wherein the two or more layers comprise greater than or about 100 layers.
  19. 19 . The semiconductor processing method of claim 16 , wherein the chucking voltage is greater than or about 1.4 kV.
  20. 20 . The semiconductor processing method of claim 16 , wherein the seasoning layer comprises a modulus of greater than or about 50 GPA, a hardness of greater than or about 5 GPA, less than 1 wt. % impurities, or a combination thereof.

Description

TECHNICAL FIELD The present technology relates to semiconductor systems, processes, and equipment. More specifically, the present technology relates to systems and methods for seasoning semiconductor processing components. BACKGROUND Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned material on a substrate requires controlled methods for forming and removing material. Some processes to make integrated circuits include the deposition of many layers on a substrate. In some instances, the cumulative stresses generated by the increasing number of layers can create stresses that are large enough to warp the substrate during fabrication. The substrate warping, also referred to as bowing, can have many adverse effects on circuit fabrication, including the formation of layers with an uneven thickness across the substrate surface. Electrostatic chucks are utilized to reduce bowing during processing. However, existing electrostatic chucks either fail to fully flatten a bowed substrate or exhibit unacceptable arcing during processing. Thus, there is a need for improved systems and methods which can be used to produce high quality devices and structures with reduced arcing during semiconductor processing. SUMMARY The present disclosure is generally directed to methods of seasoning semiconductor processing chamber components, as well as seasoned processing chamber components. Methods include flowing one or more deposition precursors at a deposition temperature into a substrate processing region of a semiconductor processing chamber housing the semiconductor processing chamber component, where the substrate processing region includes an electrostatic chuck, and the one or more deposition precursors are generally free of a nitride precursor. Methods include depositing at least a first seasoning layer on the semiconductor processing chamber component, where the at least the first seasoning layer comprises a thickness of greater than 0.5 μm. In embodiments, methods include where the semiconductor processing chamber component includes an electrostatic chuck. Furthermore, in embodiments, the one or more deposition precursors include a silicon-containing precursor, the silicon-containing precursor comprising silane (SiH4), disilane (Si2H6), trisilane (Si3H8), silicon tetrachloride (SiCl4), tetraethyl orthosilicate (TEOS), or combinations thereof. In more embodiments, the one or more deposition precursors includes an oxygen-containing precursor, the oxygen containing precursor including molecular oxygen (O2), ozone (O3), or combinations thereof. Additionally or alternatively, in embodiments, the one or more deposition precursors include tetraethyl orthosilicate and molecular oxygen. In embodiments, one or more deposition precursors includes a silicon-containing precursor and an oxygen-containing precursor, where a ratio of the oxygen-containing precursor to the silicon-containing precursor is greater than or about 1:1. Moreover, in embodiments, the at least a first seasoning layer includes silicon oxide, and exhibits a thickness greater than or about 1 micrometer. In further embodiments, the seasoning layer includes a thickness greater than or about 3.6 micrometers. In embodiments, the deposition temperature is greater than or about 350° C. In yet more embodiments, the deposition temperature is greater than 550° C. The present technology is also generally directed to substrate support assemblies. Assemblies include an electrostatic chuck, where at least a portion of the electrostatic chuck comprises a seasoning layer. Assemblies include a support stem coupled to the electrostatic chuck, and an electrode embedded within the electrostatic chuck between a substrate support surface and the support stem. Assemblies include where the seasoning layer has a thickness greater than 0.5 micrometers and is free of nitride or nitride containing materials. In embodiments, the seasoning layer comprises silicon oxide and exhibits a thickness greater than or about 1 micrometer. Moreover, in embodiments, the seasoning layer has a thickness greater than or about 3.6 micrometers. In further embodiments, the support substrate further includes a heater embedded within the electrostatic chuck. Embodiments include where the seasoning layer exhibits a modulus of greater than or about 50 GPA, a hardness of greater than or about 5 GPA, less than 1 wt. % impurities, or a combination thereof. The present technology is also generally directed to semiconductor processing methods. Methods include contacting a semiconductor substrate with an electrostatic chuck in a substrate processing region of a semiconductor processing chamber, where the electrostatic chuck has been seasoned with a seasoning layer, where the seasoning layer is generally free of nitride or nitride containing materials. Methods include applying a chucking voltage to the semiconductor substrate of