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US-20260126719-A1 - PHOTOMASK HAVING RECESSED REGION

US20260126719A1US 20260126719 A1US20260126719 A1US 20260126719A1US-20260126719-A1

Abstract

A method includes disposing a photoresist layer over a wafer. The photoresist layer is exposed by using a photomask. The photoresist layer is developed with a developer solution. The photomask includes a substrate having a recess therein and a main feature over the substrate. A width of the main feature is greater than a width of the recess in a top view, and a depth of the recess is less than about one third of a height of the main feature in a cross-sectional view.

Inventors

  • Yu-Yu Chen
  • Chi-Hung Liao

Assignees

  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Dates

Publication Date
20260507
Application Date
20251229

Claims (20)

  1. 1 . A method comprising: disposing a photoresist layer over a wafer; exposing the photoresist layer by using a photomask comprising: a substrate having a recess therein; and a main feature over the substrate, wherein a width of the main feature is greater than a width of the recess in a top view, and a depth of the recess is less than about one third of a height of the main feature in a cross-sectional view; and developing the photoresist layer with a developer solution.
  2. 2 . The method of claim 1 , wherein the depth of the recess is greater than about one tenth of the height of the main feature.
  3. 3 . The method of claim 1 , wherein the recess is linear in the top view.
  4. 4 . The method of claim 1 , wherein the width of the recess is less than about one fifth the width of the main feature.
  5. 5 . The method of claim 1 , wherein the width of the recess is greater than about 1/15 the width of the main feature.
  6. 6 . The method of claim 1 , wherein the photomask further comprising a filling material in the recess.
  7. 7 . The method of claim 6 , wherein a top surface of the filling material is substantially level with a top surface of the substrate.
  8. 8 . A method comprising: providing a wafer with a photoresist layer formed thereon; providing a radiation to a photomask to expose the photoresist layer, wherein the photomask comprises: a substrate having a first recess and a second recess; a first main feature and a second main feature over the substrate and having a first pitch therebetween; a third main feature spaced apart from the second main feature and having a second pitch therebetween, wherein the second pitch is greater than the first pitch, and the first recess is between the second main feature and the third main feature, the third main feature is between and adjacent to the first recess and the second recess, and the first recess has a first width different from a second width of the second recess; and developing the photoresist layer after exposing the photoresist layer.
  9. 9 . The method of claim 8 , wherein a distance between the first recess and the third main feature is about 0.7 to about 1.3 times of the first pitch.
  10. 10 . The method of claim 8 , wherein a distance between the second recess and the third main feature is about 0.7 to about 1.3 times of the first pitch.
  11. 11 . The method of claim 8 , wherein a height of the third main feature is greater than a depth of the first recess.
  12. 12 . The method of claim 8 , further comprising a filling material in the first recess.
  13. 13 . The method of claim 12 , wherein the filling material and the third main feature are made of substantially the same material.
  14. 14 . The method of claim 12 , wherein a top surface of the filling material is substantially level with a top surface of the third main feature.
  15. 15 . A method comprising: forming a photoresist layer over a wafer; exposing the photoresist layer by using a photomask comprising: a substrate; a main feature over a first surface of the substrate; and a filling material, wherein at least a portion of the filling material is embedded in the substrate, and a top surface of the filling material is not lower than the first surface of the substrate; and developing the photoresist layer after exposing the photoresist layer.
  16. 16 . The method of claim 15 , wherein the top surface of the filling material is substantially level with the first surface of the substrate.
  17. 17 . The method of claim 15 , wherein the top surface of the filling material is substantially level with a top surface of the main feature.
  18. 18 . The method of claim 15 , wherein a depth of the portion of the filling material is less than about one third of a height of the main feature in a cross-sectional view.
  19. 19 . The method of claim 15 , wherein the main feature and the filling material are made of the same material.
  20. 20 . The method of claim 15 , wherein a width of the filling material is less than about one fifth a width of the main feature.

Description

PRIORITY CLAIM AND CROSS-REFERENCE This application is a Continuation application of the U.S. application Ser. No. 18/472,981, filed on Sep. 22, 2023, which is a Divisional application of U.S. patent application Ser. No. 17/406,654, filed Aug. 19, 2021, now U.S. Pat. No. 11,914,288, issued Feb. 27, 2024, which is a Continuation application of the U.S. application Ser. No. 16/383,595, filed on Apr. 13, 2019, now U.S. Pat. No. 11,099,478, issued Aug. 24, 2021, which claims priority to U.S. Provisional Application Ser. No. 62/718,952, filed on Aug. 14, 2018, all of which are herein incorporated by reference in their entirety. BACKGROUND In integrated circuit fabrication, photomasks are used for imaging patterns onto photoresist layers during the photolithography process. The continual drive for increasing the density of transistors in integrated circuits requires increases in the density of the main features on the photomasks. As the dimensions of the main features of the photomasks become smaller and smaller, optical proximity effects distort the patterns imaged onto the photoresist layers. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various main features are not drawn to scale. In fact, the dimensions of the various main features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 shows a top view of a photomask according to some embodiments of the present disclosure. FIG. 2 shows a cross sectional view of a photomask according to some embodiments of the present disclosure. FIG. 3 shows a top view of a photomask according to some embodiments of the present disclosure. FIG. 4 shows a cross sectional view of a photomask according to some embodiments of the present disclosure. FIG. 5 shows a flowchart for producing a photomask according to some embodiments of the present disclosure. FIGS. 6A to 6G show perspective views of a photomask in production according to some embodiments of the present disclosure. FIGS. 7A to 7L show perspective views of a photomask in production according to some embodiments of the present disclosure. FIGS. 8A to 8D show perspective views of a photomask in production according to some embodiments of the present disclosure. FIG. 9 shows a flowchart for producing an integrated circuit by applying a photomask according to some embodiments of the present disclosure. FIGS. 10A to 10F show perspective views of an integrated circuit being produced on a wafer substrate by applying a photomask according to some embodiments of the present disclosure. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different main features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first main feature over or on a second main feature in the description that follows may include embodiments in which the first and second main features are formed in direct contact, and may also include embodiments in which additional main features may be formed between the first and second main features, such that the first and second main features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or main feature's relationship to another element(s) or main feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. The advanced lithography process, method, and materials described in the current disclosure can be used in many applications, including fin-type field effect transistors (FinFETs). For example, the fins may be patterned to produce a relatively close spacing between features, for which the above disclosure is well suited. In addition, spacers used in forming fins of FinFETs can be processed according to the above disclosure. Some embodiments of the present disclosure relates to a photomask formed with a recessed region configured to diffract radiation without imaging a pattern when illuminated from above.