US-20260126837-A1 - EARLY DETECTION AND MANAGEMENT OF THERMAL RISK FOR INFORMATION HANDLING SYSTEMS

US20260126837A1US 20260126837 A1US20260126837 A1US 20260126837A1US-20260126837-A1

Abstract

A disclosed thermal management method monitors a temperature of a component. Upon detecting a temperature lower than a pre-throttling temperature (PTT), the component is operated without thermal management constraints. Upon detecting a temperature exceeding the PTT, the component is operated with a pre-throttling constraint to reduce component power consumption without constraining a throttling parameter (e.g., clock speed, inserted time delay). Upon detecting a component temperature exceeding a first thermal management temperature (TMT1), performing first stage throttling is performed to limit the throttling parameter to a first stage value. The method may respond to detecting a component temperature exceeding a second TMT (TMT2) by performing second stage throttling to constrain the throttling parameter to a second stage value. The component may be a PCIe nonvolatile memory (NVM) and the pre-throttling constraint may reduce the PCIe link speed from a PCIe Gen5 value to a PCIe Gen4 or Gen3 value.

Inventors

Min Thu Aung
Chai Im Teoh
Young Hwan Jang

Assignees

DELL PRODUCTS L.P.

Dates

Publication Date: 20260507
Application Date: 20241101

Claims (20)

1 . A thermal management method, comprising: monitoring a temperature of an information handling system component; responsive to detecting a component temperature less than a pre-throttling temperature (PTT), operating the component without thermal management constraints; responsive to detecting a component temperature greater than or equal to the PTT, operating the component with a pre-throttling constraint to reduce power consumption of the component without constraining a throttling parameter; and responsive to detecting a component temperature greater than or equal to a first thermal management temperature (TMT1), performing first stage throttling to limit the throttling parameter in accordance with a first stage value for the throttling parameter.
2 . The method of claim 1 , further comprising: responsive to detecting a component temperature greater than or equal to a second TMT (TMT2), performing second stage throttling to constrain the performance throttling parameter in accordance with a second stage value for the throttling parameter.
3 . The method of claim 2 , wherein the TMT1 is in the range of 73 C to 79 C, the TMT1 is in the range of 79 C to 83 C, and the TMT2 is in the range of 81 to 85 C.
4 . The method of claim 2 , wherein the PTT is less than the TMT1 and the TMT1 is less than the TMT2.
5 . The method of claim 1 , wherein the throttling parameter is selected from: component clock frequency and minimum inserted time delay.
6 . The method of claim 1 , wherein the pre-throttling constraint comprises a constraint on a link speed for a communication link over which the component communicates with another component of the information handling system.
7 . The method of claim 6 , wherein the communication link comprises a peripheral component interface express (PCIe) communication link.
8 . The method of claim 6 , wherein the component comprises a PCIe solid state drive (SSD).
9 . The method of claim 1 , wherein the component comprises peripheral communication interface express (PCIe) component communicatively coupled to a central processing unit (CPU) of the information handling system via a PCIe bus.
10 . The method of claim 9 , wherein the thermal management constraint includes a constraint on a parameter selected from: a link speed of the PCIe bus, a clock speed of the PCIe component, and a minimum inserted time delay.
11 . An information handling system, comprising: a central processing unit (CPU); a system memory, accessible to the CPU, including processor executable instructions that, when executed by the CPU, cause the system to perform thermal management operations, including: monitoring a temperature of an information handling system component; responsive to detecting a component temperature less than a pre-throttling temperature (PTT), operating the component without thermal management constraints; responsive to detecting a component temperature greater than or equal to the PTT, operating the component with a pre-throttling constraint to reduce power consumption of the component without constraining a throttling parameter; and responsive to detecting a component temperature greater than or equal to a first thermal management temperature (TMT1), performing first stage throttling to limit the throttling parameter in accordance with a first stage value for the throttling parameter.
12 . The information handling system of claim 11 , wherein the thermal management operations further include: responsive to detecting a component temperature greater than or equal to a second TMT (TMT2), performing second stage throttling to constrain the performance throttling parameter in accordance with a second stage value for the throttling parameter.
13 . The information handling system of claim 12 , wherein the TMT1 is in the range of 73 C to 79 C, the TMT1 is in the range of 79 C to 83 C, and the TMT2 is in the range of 81 to 85 C.
14 . The information handling system of claim 12 , wherein the PTT is less than the TMT1 and the TMT1 is less than the TMT2.
15 . The information handling system of claim 11 , wherein the throttling parameter is selected from: component clock frequency and minimum inserted time delay.
16 . The information handling system of claim 11 , wherein the pre-throttling constraint comprises a constraint on a link speed for a communication link over which the component communicates with another component of the information handling system.
17 . The information handling system of claim 16 , wherein the communication link comprises a peripheral component interface express (PCIe) communication link.
18 . The information handling system of claim 16 , wherein the component comprises a PCIe solid state drive (SSD).
19 . The information handling system of claim 11 , wherein the component comprises peripheral communication interface express (PCIe) component communicatively coupled to a central processing unit (CPU) of the information handling system via a PCIe bus.
20 . The information handling system of claim 19 , wherein the thermal management constraint includes a constraint on a parameter selected from: a link speed of the PCIe bus, a clock speed of the PCIe component, and a minimum inserted time delay.

Description

TECHNICAL FIELD The present disclosure is in the field of information handling systems and, more specifically, thermal management of information handling systems. BACKGROUND As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems. Semiconductors and other materials used for information handling system components generate thermal energy, i.e., heat, during operation. Heat is generally detrimental to system performance and, if not properly managed and dissipated, can result in component or system failures. The use of high performance, high power components including, as a representative example, Peripheral Component Interconnect Express (PCIe) fifth generation (Gen5) SSDs in information handling systems, while offering significant performance benefits, introduces potential thermal risks due to the comparatively high power consumption and the corresponding comparatively high generation of thermal energy. Controlled testing between Gen4 and Gen5 SSDs using a storage benchmark have recorded a maximum temperature of roughly 58 C for Gen5 SSD devices versus 43 C for Gen4 despite the use of a larger heatsink to prevent the Gen5 device from triggering thermal shutdown. SUMMARY Thermal management challenges presented by high performance components such as Gen5 SSDs are addressed by thermal management methods and systems disclosed herein. In at least one aspect, a disclosed thermal management method monitors a temperature of a component. Upon detecting a temperature lower than a pre-throttling temperature (PTT), the component is operated without thermal management constraints including constraints on a link speed of a PCIe or another suitable type of serial data bus, a component clock frequency, and a minimum inserted time delay. Upon detecting a temperature exceeding the PTT, the component is operated with a pre-throttling constraint to reduce component power consumption without constraining a throttling parameter (e.g., component clock frequency, minimum inserted time delay). Upon detecting a component temperature exceeding a first thermal management temperature (TMT1), performing first stage throttling is performed to limit the throttling parameter to a first stage value. The method may respond to detecting a component temperature exceeding a second TMT (TMT2) by performing second stage throttling to constrain the throttling parameter to a second stage value. The component may be a PCIe solid state drive (SSD) or other type of nonvolatile memory (NVM) and the pre-throttling constraint may reduce the PCIe link speed of the SSD or other NVM from a PCIe Gen5 value to a PCIe Gen4 or Gen3 value. In at least one embodiment, representative values for the PTT may be in a range between 73 C and 79 C, representative values for the TMT1 may be in a range between 79 C and 83 C, and representative values for the TMT2 may be in the range between 81 and 85 C. In at least one embodiment, a PTT value of 76 C, a TMT1 value of 81 C and a TMT2 values of 83 C may be used, at least initially, and the values may be modified time to time based on historical data. Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the present embodiments and advantages t