US-20260126841-A1 - UNIVERSAL SERIAL BUS POWER DELIVERY DEVICE AND METHOD OF INVALID HARD RESET DETECTION

US20260126841A1US 20260126841 A1US20260126841 A1US 20260126841A1US-20260126841-A1

Abstract

A universal serial bus (USB) power delivery device is provided, including a bit detector, a start of packet (SOP) cycle counter, a reset detector, and a flag generator. The bit detector receives and detects an input data signal, and enables a preamble confirmation signal in response to a preamble byte in the input data signal. The SOP cycle counter starts counting and enables an SOP enable signal in response to the preamble confirmation signal being disabled. The reset detector receives and determines whether the input data signal includes codes related to a hard reset, to output an invalid hard reset signal and a K code confirmation signal. The flag generator receives the SOP enable signal, the invalid hard reset signal, the K code confirmation signal, and a reset enable signal, to output an invalid hard reset flag to an event recorder.

Inventors

Chih-Ming Chen

Assignees

NUVOTON TECHNOLOGY CORPORATION

Dates

Publication Date: 20260507
Application Date: 20250813
Priority Date: 20241105

Claims (10)

1 . A universal serial bus (USB) power delivery device, comprising: a bit detector, configured to receive and detect an input data signal, wherein the bit detector is configured to enable a preamble confirmation signal in response to a preamble byte in the input data signal; a start of packet (SOP) cycle counter, configured to start counting and enable an SOP enable signal in response to the preamble confirmation signal being disabled; a reset detector, configured to receive and determine whether the input data signal includes codes related to a hard reset, to output an invalid hard reset signal and a K code confirmation signal; and a flag generator, configured to receive the SOP enable signal, the invalid hard reset signal, the K code confirmation signal, and a reset enable signal, to output an invalid hard reset flag to an event recorder, wherein, in response to the invalid hard reset signal being disabled, the flag generator disables the invalid hard reset flag, and the disabled invalid hard reset flag indicates a hard reset event does not exist; and wherein, in response to the preamble confirmation signal being enabled, or in response to the SOP cycle counter counting to a value greater than a preset value, the SOP cycle counter disables the SOP enable signal.
2 . The USB power delivery device as claimed in claim 1 , wherein the bit detector comprises: a bus idle detector, configured to enable a bus idle signal in response to a bus idle byte in the input data signal; and a bit comparator, configured to enable the preamble confirmation signal in response to the preamble byte in the input data signal.
3 . The USB power delivery device as claimed in claim 1 , wherein the reset detector comprises: a K code comparator, configured to compare the input data signal and a valid hard reset code in response to the preamble confirmation signal being disabled and the SOP enable signal being enabled, wherein the K code comparator enables the K code confirmation signal in response to a comparison result being the same; and an invalid hard reset detector, configured to compare the input data signal and the valid hard reset code in response to the preamble confirmation signal being disabled, wherein the invalid hard reset detector enables the invalid hard reset signal in response to a comparison result being the same.
4 . The USB power delivery device as claimed in claim 1 , wherein the flag generator is configured to: determine whether the invalid hard reset signal is enabled in response to the preamble confirmation signal being disabled; determine whether the SOP enable signal is enabled in response to the invalid hard reset signal being enabled; and enabling and outputting the invalid hard reset flag to the event recorder in response to the SOP enable signal being enabled.
5 . The USB power delivery device as claimed in claim 4 , wherein the operation of the flag generator determining whether the invalid hard reset signal is enabled further comprises: the flag generator disables and outputs the invalid hard reset flag to the event recorder in response to the invalid hard reset signal not being enabled.
6 . The USB power delivery device as claimed in claim 4 , wherein the operation of the flag generator determining whether the SOP enable signal is enabled further comprises: the flag generator determines whether the K code confirmation signal is enabled and the reset enable signal is disabled in response to the SOP enable signal not being enabled; and the flag generator disables and outputs the invalid hard reset flag to the event recorder in response to the K code confirmation signal being enabled and the reset enable signal being disabled.
7 . The USB power delivery device as claimed in claim 6 , wherein the operation of the flag generator determining whether the K code confirmation signal is enabled and the reset enable signal is disabled further comprises: the flag generator determines whether the reset enable signal is enabled in response to the K code confirmation signal not being enabled or the reset enable signal not being disabled; and the flag generator enables and outputs the invalid hard reset flag to the event recorder in response to the reset enable signal being enabled.
8 . The USB power delivery device as claimed in claim 7 , wherein the operation of the flag generator determining whether the reset enable signal is enabled further comprises: the flag generator disables and outputs the invalid hard reset flag to the event recorder in response to the reset enable signal not being enabled.
9 . A method for detecting an invalid hard reset, comprising: disabling a preamble confirmation signal in response to an input data signal without a preamble byte; starting to count, using a start of packet (SOP) cycle counter, and outputting an SOP enable signal in response to the preamble confirmation signal being disabled; generating a K code confirmation signal and an invalid hard reset signal in response to the preamble confirmation signal and the SOP enable signal; and outputting an invalid hard reset flag to an event recorder in response to the SOP enable signal, the K code confirmation signal, the invalid hard reset signal, and a reset enable signal, wherein, in response to counting, by the SOP cycle counter, to a value greater than a preset value, or in response to the preamble confirmation signal being enabled, disabling the SOP enable signal; and wherein, in response to the invalid hard reset signal and the SOP enable signal being enabled, enabling the invalid hard reset flag.
10 . The method as claimed in claim 9 , further comprising: disabling the invalid hard reset flag in response to the invalid hard reset signal being disabled; disabling the invalid hard reset flag in response to the invalid hard reset signal, the SOP enable signal, and the K code confirmation signal being enabled, and the reset enable signal 5 being disabled; or enabling the invalid hard reset flag in response to the invalid hard reset signal, the SOP enable signal, and the reset enable signal being enabled.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application claims priority of Taiwan patent application No. 113142206, filed Nov. 5, 2024, the entirety of which is incorporated by reference herein. TECHNICAL FIELD The present disclosure relates to a universal serial bus (USB) power delivery (PD) device, and, in particular, it relates to a USB PD device and a method for detecting invalid hard reset events. BACKGROUND In universal serial bus (USB) power delivery (PD), transmitted packet sequences usually have a valid hard reset event during the testing or actual use of a USB PD device. In addition, the transmission process may be disturbed (by noise, for example), causing the transmitted packet sequence to have bits become inverted due to interference, which may lead to an invalid hard reset event. Therefore, a solution is needed to enable USB PD devices to perform a hard reset when a valid hard reset event occurs, while ignoring invalid hard reset events. BRIEF SUMMARY An embodiment of the present disclosure provides a universal serial bus (USB) power delivery device, comprising a bit detector, a start of packet (SOP) cycle counter, a reset detector, and a flag generator. The bit detector is configured to receive and detect an input data signal, and is configured to enable a preamble confirmation signal in response to a preamble byte in the input data signal. The SOP cycle counter is configured to start counting and enable an SOP enable signal in response to the preamble confirmation signal being disabled. The reset detector is configured to receive and determine whether the input data signal includes codes related to a hard reset, to output an invalid hard reset signal and a K code confirmation signal. The flag generator is configured to receive the SOP enable signal, the invalid hard reset signal, the K code confirmation signal, and a reset enable signal, to output an invalid hard reset flag to an event recorder. According to an embodiment of the present disclosure, in response to the invalid hard reset signal being disabled, the flag generator disables the invalid hard reset flag, and the disabled invalid hard reset flag indicates a hard reset event does not exist. In response to the preamble confirmation signal being enabled, or in response to the SOP cycle counter counting to a value greater than a preset value, the SOP cycle counter disables the SOP enable signal. An embodiment of the present disclosure provides a method for detecting an invalid hard reset, comprising disabling a preamble confirmation signal in response to an input data signal without a preamble byte. The method further comprises starting to count using a start of packet (SOP) cycle counter and outputting an SOP enable signal in response to the preamble confirmation signal being disabled. The method further comprises generating a K code confirmation signal and an invalid hard reset signal in response to the preamble confirmation signal and the SOP enable signal. The method further comprises outputting an invalid hard reset flag to an event recorder in response to the SOP enable signal, the K code confirmation signal, the invalid hard reset signal, and a reset enable signal. According to an embodiment of the present disclosure, the SOP enable signal is disabled in response to the SOP cycle counter reaching a value that is greater than a preset value, or in response to the preamble confirmation signal being enabled. The invalid hard reset flag is enabled in response to the invalid hard reset signal and the SOP enable signal being enabled. BRIEF DESCRIPTION OF THE DRAWINGS The present disclosure can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: FIG. 1 is a schematic diagram of a packet specification according to an embodiment of the present disclosure. FIG. 2 is a block flow chart of a universal serial bus (USB) power delivery (PD) device detecting a hard reset event according to an embodiment of the present disclosure. FIG. 3 is a flow chart of a flag generator generating an invalid hard reset flag according to an embodiment of the present disclosure. FIG. 4 is a timing diagram of a USB PD device detecting an invalid hard reset event according to an embodiment of the present disclosure. DETAILED DESCRIPTION To make the aforementioned and other objects, features, and advantages of the present disclosure more clearly understandable, preferred embodiments are listed below and are described in detail below regarding the accompanying drawings: Some embodiments are summarized below so that those with ordinary skills in the art can more easily understand the embodiments of the present disclosure. However, these embodiments are only examples and are not used to limit the embodiments of the present disclosure. It will be understood that those with ordinary skills in the art can adjust the embodiments described below according to needs, such as changin