US-20260126999-A1 - UPDATING TRAINING DATA

Abstract

There is provided an apparatus comprising training storage circuitry configured to store training entries, each comprising training data indicative of a trigger memory access request to local storage. The apparatus comprises filter circuitry to generate a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests. The apparatus comprises training circuitry to monitor the filtered sequence, and responsive to observation of the trigger memory access request indicated in a training entry, to update the training data in the training entry. The filter circuitry is configured for each memory access request of the sequence that resulted in a hit on a data item in the local storage, to include the memory access request in the filtered sequence in dependence on a filter criterion independent of a type of request that resulted in the data item being allocated to the local storage.

Inventors

• Ugo CASTORINA
• Damien Matthieu Valentin CATHRINE
• Orestis Chiotakis
• Vincenzo CONSALES

Assignees

• ARM LIMITED

Dates

Publication Date

20260507

Application Date

20250117

Priority Date

20241107

Claims (20)

1. 1 . An apparatus comprising: training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used for generation of speculative memory access requests for retrieval of data into the local storage structure by a predictive structure in response to observation of the trigger memory access request; filter circuitry configured to generate a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests to the local storage structure; and training circuitry configured to monitor the filtered sequence of memory access requests, and responsive to observation of the trigger memory access request indicated in a training entry of the one or more training entries, to update the training data in the training entry based on the filtered sequence of memory access requests, wherein: the filter circuitry is configured for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, to include the given memory access request in the filtered sequence of memory access requests in dependence on a filter criterion; and the filter criterion is independent of a type of request that resulted in the data item being allocated into the local storage structure.
2. 2 . The apparatus of claim 1 , wherein the filter criterion is based on the training data comprised in the one or more training entries.
3. 3 . The apparatus of claim 2 , wherein the filter circuitry is configured: to perform a determination, for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, of whether the given memory access request is comprised in the training data comprised in the one or more training entries; and in response to the given memory access request being comprised in the training data, to include the given memory access request in the filtered sequence of memory access requests.
4. 4 . The apparatus of claim 3 , wherein the determination comprises performing a lookup based on an identifier derived from the given memory access request.
5. 5 . The apparatus of claim 4 , wherein the identifier comprises at least one of: a hash of a program counter value of the given memory access request; and a micro operation identifier of the given memory access request assigned during processing of the given memory access request.
6. 6 . The apparatus of claim 4 , wherein the determination comprises performing the lookup in the training storage circuitry.
7. 7 . The apparatus of claim 4 , comprising buffer storage circuitry configured to store training data identifying information derived from the training data and indicative of the trigger memory access request and/or the subsequent memory access requests indicated in the training data, wherein the determination comprises performing the lookup in the buffer storage circuitry.
8. 8 . The apparatus of claim 7 , wherein the training data identifying information comprises a list of training identifiers associated with the trigger memory access request and/or the subsequent memory access requests indicated in the training data.
9. 9 . The apparatus of claim 7 , wherein the training data identifying information comprises a combined hash value derived by combining training identifiers associated with the trigger memory access request and/or the subsequent memory access requests indicated in the training data.
10. 10 . The apparatus of claim 9 , wherein the buffer storage circuitry is configured as a Bloom filter and the combined hash value is derived by applying the Bloom filter to the training identifiers.
11. 11 . The apparatus of claim 1 , wherein the predictive structure is prefetching circuitry configured to speculatively issue prefetch requests for the data to be retrieved into the local storage structure in advance of a demand request for the data.
12. 12 . The apparatus of claim 11 , wherein the prefetching circuitry is arranged as indirect prefetching circuitry configured to prefetch producer data indicative of a consumer memory address, and to prefetch consumer data based on the consumer memory address.
13. 13 . The apparatus of claim 12 , wherein the filter circuitry is configured to include the given memory access request in the filtered sequence of memory access requests when the given memory access request is identified as a prefetch request for consumer data in the training data.
14. 14 . The apparatus of claim 1 , wherein: the filter circuitry is responsive to the monitored access request satisfying the filter criterion, to include the monitored memory access request in the filtered sequence of memory access requests; and the filter circuitry is responsive to the monitored access request failing to satisfy the filter criterion, to exclude the monitored memory access request from the filtered sequence of memory access requests.
15. 15 . The apparatus of claim 1 , wherein the filter circuitry is configured to include in the filtered sequence of memory access requests at least a first set of the sequence of memory access requests that resulted in a hit in the local storage structure, and to exclude from the filtered sequence of memory access requests at least a second set of the sequence of memory access requests that resulted in a hit in the local storage structure.
16. 16 . The apparatus of claim 15 , wherein: the first set comprises memory access requests that are already identified in at least one of the one or more training entries; and the second set comprises memory access requests that are not identified in at least one of the one or more training entries.
17. 17 . A system comprising: the apparatus of claim 1 , implemented in at least one packaged chip; at least one system component; and a board, wherein the at least one packaged chip and the at least one system component are assembled on the board.
18. 18 . A chip-containing product comprising the system of claim 17 , wherein the system is assembled on a further board with at least one other product component.
19. 19 . A method of operating an apparatus comprising training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used for generation of speculative memory access requests for retrieval of data into the local storage structure by a predictive structure in response to observation of the trigger memory access request, the method comprising: generating a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests to the local storage structure; for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, including the given memory access request in the filtered sequence of memory access requests in dependence on a filter criterion, wherein the filter criterion is independent of a type of request that resulted in the data item being allocated into the local storage structure; monitoring the filtered sequence of memory access requests; and in response to observation of the trigger memory access request indicated in a training entry of the one or more training entries, updating the training data in the training entry based on the filtered sequence of memory access requests.
20. 20 . A non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising: training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used for generation of speculative memory access requests for retrieval of data into the local storage structure by a predictive structure in response to observation of the trigger memory access request; filter circuitry configured to generate a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests to the local storage structure; and training circuitry configured to monitor the filtered sequence of memory access requests, and responsive to observation of the trigger memory access request indicated in a training entry of the one or more training entries, to update the training data in the training entry based on the filtered sequence of memory access requests, wherein: the filter circuitry is configured for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, to include the given memory access request in the filtered sequence of memory access requests in dependence on a filter criterion; and the filter criterion is independent of a type of request that resulted in the data item being allocated into the local storage structure.

Description

TECHNICAL FIELD The present invention relates to data processing. More particularly the present invention relates to an apparatus, a system, a chip containing product, a method, and a computer-readable medium. BACKGROUND Some apparatuses are provided with predictive structures configured to generate speculative memory access requests for retrieval of data into local storage circuitry. The predictive structures determine the data to be retrieved based on training data which is generated by training circuitry. SUMMARY According to a first aspect of the present techniques there is provided an apparatus comprising: training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used for generation of speculative memory access requests for retrieval of data into the local storage structure by a predictive structure in response to observation of the trigger memory access request;filter circuitry configured to generate a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests to the local storage structure; andtraining circuitry configured to monitor the filtered sequence of memory access requests, and responsive to observation of the trigger memory access request indicated in a training entry of the one or more training entries, to update the training data in the training entry based on the filtered sequence of memory access requests,wherein:the filter circuitry is configured for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, to include the given memory access request in the filtered sequence of memory access requests in dependence on a filter criterion; andthe filter criterion is independent of a type of request that resulted in the data item being allocated into the local storage structure. According to a second aspect of the present techniques there is provided a system comprising: the apparatus according to the first aspect, implemented in at least one packaged chip;at least one system component; anda board,wherein the at least one packaged chip and the at least one system component are assembled on the board. According to a third aspect of the present techniques there is provided a chip-containing product comprising the system according to the second aspect, wherein the system is assembled on a further board with at least one other product component. According to a fourth aspect of the present techniques there is provided a method of operating an apparatus comprising training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used for generation of speculative memory access requests for retrieval of data into the local storage structure by a predictive structure in response to observation of the trigger memory access request, the method comprising: generating a filtered sequence of memory access requests by applying a filter to a sequence of memory access requests to the local storage structure;for each given memory access request of the sequence of memory access requests that resulted in a hit on a data item in the local storage structure, including the given memory access request in the filtered sequence of memory access requests in dependence on a filter criterion, wherein the filter criterion is independent of a type of request that resulted in the data item being allocated into the local storage structure;monitoring the filtered sequence of memory access requests; andin response to observation of the trigger memory access request indicated in a training entry of the one or more training entries, updating the training data in the training entry based on the filtered sequence of memory access requests. According to a fifth aspect of the present techniques there is provided a non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising: training storage circuitry configured to store one or more training entries, each of the one or more training entries comprising training data indicative of a trigger memory access request to a local storage structure and one or more relationships between the trigger memory access request and subsequent memory access requests to the local storage structure, wherein the training data is suitable to be used f