US-20260127109-A1 - DATA LOSS PROTECTION FOR MEMORY SYSTEMS AND DEVICES

Abstract

Systems, methods, and devices prevent data loss in memory devices. Systems may include a non-volatile memory device that includes a first data unit configured to store data for the non-volatile memory device and associated metadata, and a second data unit configured to store data for the non-volatile memory device and associated metadata, wherein the first data unit and second data unit are configured to alternate storing a most recent version of the data and associated metadata. The systems may also include control circuitry configured to read metadata from the first data unit and the second data unit, identify the first data unit as an inactive data unit based on contents of the first data unit and the second data unit, and perform one or more update operations such that the first data unit is updated and set as an active unit when the update operations are complete.

Inventors

• Amichai GIVANT
• Yoav Yogev
• Shivananda Shetty
• Stefano AMATO
• Itzic Cohen
• Idan Koren
• Yair Sofer

Assignees

• Infineon Technologies LLC

Dates

Publication Date

20260507

Application Date

20251103

Claims (20)

1. 1 - 20 . (canceled)
2. 21 . A non-volatile memory (NVM) system, comprising: a memory device including multiple erase sectors each including multiple NVM cells, wherein first and second sectors of the multiple erase sectors are each configured to store special data and associated metadata; and control circuitry comprising implemented logic configured to: identify the first sector as an active sector based at least on a first count value and a first valid indicator stored therein; refresh the first valid indicator; identify the second sector as an inactive sector based at least on a second count value and a second valid indicator stored therein; reset the second valid indicator; erase the second sector; program an increased count value to replace the second count value, wherein the increased count value is greater than the first count value; program the second sector with updated special data; and program the second valid indicator with a valid code.
3. 22 . The NVM system of claim 21 , wherein the control circuitry is further configured to determine if the first and second sectors are valid, including: reading the first and second valid indicators; determining the first sector is valid in response to the first valid indicator includes the valid code; determining the second sector is valid in response to the second valid indicator includes the valid code; and generating an error message in response to neither the first nor second valid indicators including the valid code.
4. 23 . The NVM system of claim 21 , wherein identify the first sector as the active sector includes: comparing the first and second count values, wherein the first count value is greater than the second count value.
5. 24 . The NVM system of claim 21 , wherein the first and second sectors are configured to alternate storing a most recent version of the special data and the associated metadata.
6. 25 . The NVM system of claim 21 , wherein the memory device is a flash memory device.
7. 26 . The NVM system of claim 21 , wherein the control circuitry is further configured to: receive the updated special data; initiate an update operation of the first and second sectors; and swapping active and inactive status of the first and second sectors after completion of the update operation.
8. 27 . The NVM system of claim 21 , wherein the special data includes configuration data comprising a certificate data structure and a firmware data structure.
9. 28 . The NVM system of claim 21 , wherein the metadata includes a valid indicator, a count value, and status information of its associated special data.
10. 29 . The NVM system of claim 21 , wherein the first and second valid indicators are a hash value computed based, at least in part, on the metadata of the first and second sectors, respectively.
11. 30 . A method for firmware update operation in a memory device, the method comprising: identifying, using control circuitry, a first data unit as an active unit and a second data unit as an inactive unit, wherein the first and second data units each includes multiple non-volatile memory (NVM) cells to store firmware data and associated metadata; rewriting, using the control circuitry, a first valid indicator in the first data unit; resetting, using the control circuitry, at least the metadata stored in the second data unit; writing, using the control circuitry, an increased second count value, firmware update data including version data in the second data unit; writing, using the control circuitry, a second valid indicator in the second data unit; verifying, using the control circuitry, the version data of the firmware update data stored in the second data unit; and identifying, using the control circuitry, the second data unit as a new active unit.
12. 31 . The method of claim 30 , wherein rewriting the first valid indicator includes computing a hash value based on the firmware data and the associated metadata stored in the first unit.
13. 32 . The method of claim 30 , wherein writing the second valid indicator includes computing a hash value based on the firmware update data and the associated metadata stored in the second unit.
14. 33 . The method of claim 30 , further comprising: updating, using the control circuitry, pointer data to identify the second data unit as the new active unit.
15. 34 . The method of claim 30 , further comprising: validating, using the control circuitry, integrity of the firmware update data stored in the second data unit by checking an associated error-detecting code.
16. 35 . The method of claim 30 , wherein the firmware update data includes a firmware data structure.
17. 36 . The method of claim 30 , wherein verifying the version data includes comparing to version data stored in a secure storage location in the memory device.
18. 37 . A flash memory device, comprising: a non-volatile memory (NVM) array comprising multiple erase sectors of NVM cells, wherein first and second sectors of the multiple erase sectors are each configured to store special data and associated metadata and to alternate being an active sector to store a most recent version of the special data and the associated metadata; and one or more processors configured to: identify the first sector as the active sector based on the metadata stored in the first and second sectors; reset a second valid indicator of the second sector; erase the second sector; and perform one or more update operations such that the second sector is updated; and set the second sector as the active sector when the one or more update operations are complete.
19. 38 . The flash memory device of claim 37 , wherein the active sector is a currently active sector used to store current configuration data for the flash memory device.
20. 39 . The flash memory device of claim 37 , wherein metadata includes a counter value and a valid indicator of a corresponding erase sector, and wherein perform one or more update operations includes writing an incremented second counter value to the second sector, and wherein the incremented second counter value is greater than a first counter value of the first sector.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of U.S. Non Provisional patent application Ser. No. 18/379,331, filed on Oct. 12, 2023, which claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 63/449,644, filed on Mar. 3, 2023, which are incorporated herein by reference in their entirety for all purposes. TECHNICAL FIELD This disclosure generally relates to memory devices, and more specifically, to prevention of data loss in such memory devices. BACKGROUND Memory devices may include various memory cells that are configured to store data values in accordance with a memory architecture. For example, such data values may be stored by being written or programmed using, in one example, various word lines and bit lines. Special data, such as configuration data included in a configuration registry, may be stored in such memory devices, and may be used during various memory device operations, such as the device being powered up. Accordingly, such configuration data may undergo read operations when such data is read by the memory device, as well as write/program operations when updated data is received. Traditional memory devices remain limited in their ability to store and maintain such special data in a manner that is immune to unexpected system events, such as power loss events. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates an example of a memory device, configured in accordance with some embodiments. FIG. 2 illustrates an example of a memory system that may include a memory device, configured in accordance with some embodiments. FIG. 3 illustrates a flow chart of an example of a method for data protection, performed in accordance with some embodiments. FIG. 4 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. FIG. 5 illustrates a flow chart of yet another example of a method for data protection, performed in accordance with some embodiments. FIG. 6 illustrates a flow chart of an additional example of a method for data protection, performed in accordance with some embodiments. FIG. 7 illustrates a flow chart of yet another example of a method for data protection, performed in accordance with some embodiments. FIG. 8 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. FIG. 9 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. FIG. 10A illustrates a diagram of an example an erase sector, configured in accordance with some embodiments. FIG. 10B illustrates a diagram of a progression of data included in data fields during an update of special data in accordance with some embodiments. FIG. 11 illustrates a diagram of a progression of data included in data fields during an update of a certificate and firmware in accordance with some embodiments. FIG. 12 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. FIG. 13 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. FIG. 14 illustrates a flow chart of another example of a method for data protection, performed in accordance with some embodiments. DETAILED DESCRIPTION In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented concepts. The presented concepts may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail so as not to unnecessarily obscure the described concepts. While some concepts will be described in conjunction with the specific examples, it will be understood that these examples are not intended to be limiting. Memory devices may include portions configured to store special data used for system purposes. For example, a particular portion of a memory device may be configured to store special data such as a configuration registry. Such data may be used by the memory device when powering up, as well as for various other system operations. Moreover, such data may be periodically updated based on update data received at a memory device. For example the memory device may receive a data object, also referred to herein as update data, that may include a data payload that includes an update to such configuration registry data. As will be discussed in greater detail below, in secure contexts, such data may also include a security certificate data structure used for validation purposes, as well as a firmware data structure which may be used to manage firmware. Accordingly, one or more memory operations may be performed to implement such update operations and ensure that updates included in the received update are implemented in the stored special data. However, one or more events may occ