US-20260127111-A1 - Data Storage Device and Method for Selectively Performing a Program-Verify Operation

US20260127111A1US 20260127111 A1US20260127111 A1US 20260127111A1US-20260127111-A1

Abstract

When a memory is considered to be relatively reliable, a data storage device can program the memory without performing a subsequent verify-read step. However, some memory cells may be known during the manufacturing of the data storage device to be difficult to program, and such memory cells can be identified in a predetermined list as requiring a verify-read step. Other memory cells may become difficult to program over time, and those memory cells can be identified in a dynamic list as requiring a verify-read step.

Inventors

Ankan Mukhopadhyay
Soubhik Kayal
Saikat Maji

Assignees

SanDisk Technologies, Inc.

Dates

Publication Date: 20260507
Application Date: 20241107

Claims (20)

1 - 9 . (canceled)
10 . In a data storage device comprising a memory, a method comprising: determining whether a logical wordline is identified in a static program verify data structure as requiring a read verification operation be performed after attempting to program the logical wordline; in response determining that the logical wordline is not identified in the static program verify data structure, determining whether the logical wordline is identified in a dynamic program verify data structure as requiring the read verification operation be performed after attempting to program the logical wordline; and in response determining that the logical wordline is not identified in the dynamic program verify data structure, programming the logical wordline without performing the read verification operation.
11 . The method of claim 10 , further comprising: performing the read verification operation after programming the logical wordline in response to the logical wordline not being identified in either the static program verify data structure and the dynamic program verify data structure.
12 . The method of claim 10 , further comprising: reading the logical wordline after the logical wordline has been programmed; performing a read error handling operation on data read from the logical wordline; and in response to the read error handling operation being unsuccessful, adding an identification of the logical wordline to the dynamic program verify data structure.
13 . The method of claim 12 , further comprising: recovering the data; attempting to program the recovered data in another logical wordline; and in response to a failure to program the recovered data in the another logical wordline, removing the identification of the logical wordline from the dynamic program verify data structure.
14 . The method of claim 13 , wherein: the logical wordline and the another logical wordline are in a block; and the method further comprises identifying the block as a bad block.
15 . The method of claim 13 , further comprising: performing an exclusive-or (XOR) operation to recover the data.
16 . The method of claim 13 , further comprising: storing the recovered data in a buffer memory; and attempting to program the recovered data from the buffer memory to the another logical wordline.
17 . The method of claim 10 , wherein the logical wordline is identified in the dynamic program verify data structure as a virtual block address.
18 . The method of claim 10 , wherein the logical wordline is part of a single-level cell (SLC) block.
19 . The method of claim 10 , wherein the memory comprises a three-dimensional memory,
20 . A data storage device comprising: a memory; and means for: determining whether a string of memory cells is identified in a first data structure as requiring a read verification operation be performed after attempting to program the string of memory cells; in response determining that the string of memory cells is not identified in the first data structure, determining whether the string of memory cells is identified in a second data structure as requiring the read verification operation be performed after attempting to program the string of memory cells; and in response determining that the string of memory cells is not identified in the second data structure, programming the string of memory cells without performing the read verification operation.
21 . A data storage device comprising: a memory; and one or more processors, individually or in combination, configured to: determine whether a logical wordline is identified in a static program verify data structure as requiring a read verification operation be performed after attempting to program the logical wordline; in response determining that the logical wordline is not identified in the static program verify data structure, determine whether the logical wordline is identified in a dynamic program verify data structure as requiring the read verification operation be performed after attempting to program the logical wordline; and in response determining that the logical wordline is not identified in the dynamic program verify data structure, program the logical wordline without performing the read verification operation.
22 . The data storage device of claim 21 , wherein the one or more processors, individually or in combination, are further configured to: perform the read verification operation after programming the logical wordline in response to the logical wordline not being identified in either the static program verify data structure and the dynamic program verify data structure.
23 . The data storage device of claim 21 , wherein the one or more processors, individually or in combination, are further configured to: read the logical wordline after the logical wordline has been programmed; perform a read error handling operation on data read from the logical wordline; and in response to the read error handling operation being unsuccessful, add an identification of the logical wordline to the dynamic program verify data structure.
24 . The data storage device of claim 23 , wherein the one or more processors, individually or in combination, are further configured to: recover the data; attempt to program the recovered data in another logical wordline; and in response to a failure to program the recovered data in the another logical wordline, remove the identification of the logical wordline from the dynamic program verify data structure.
25 . The data storage device of claim 24 , wherein: the logical wordline and the another logical wordline are in a block; and the one or more processors, individually or in combination, are further configured to identify the block as a bad block.
26 . The data storage device of claim 24 , wherein the one or more processors, individually or in combination, are further configured to: perform an exclusive-or (XOR) operation to recover the data.
27 . The data storage device of claim 24 , wherein the one or more processors, individually or in combination, are further configured to: store the recovered data in a buffer memory; and attempt to program the recovered data from the buffer memory to the another logical wordline.
28 . The data storage device of claim 21 , wherein the logical wordline is identified in the dynamic program verify data structure as a virtual block address.

Description

BACKGROUND In some data storage devices (e.g., solid-state drives (SSDs)), the programming of cells in the memory can be done using incremental step pulse programming, in which a read operation is performed after each applied programming pulse to verify that the memory cell was correctly programmed. If the memory cell was not correctly programmed, another programming pulse can be applied to the memory cell followed by another verify read. This can be repeated until the memory cell is correctly programmed or until a maximum number of programming attempts has been reached. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a block diagram of a data storage device of an embodiment. FIG. 1B is a block diagram illustrating a storage module of an embodiment. FIG. 1C is a block diagram illustrating a hierarchical storage system of an embodiment. FIG. 2A is a block diagram illustrating components of the controller of the data storage device illustrated in FIG. 1A according to an embodiment. FIG. 2B is a block diagram illustrating components of the data storage device illustrated in FIG. 1A according to an embodiment. FIG. 3 is a block diagram of a host and a data storage device of an embodiment. FIG. 4 is a flow chart of a programming method of an embodiment. FIG. 5 is a flow chart of a programming method of an embodiment. DETAILED DESCRIPTION The following embodiments generally relate to a data storage device and method for selectively performing a program-verify operation. In one embodiment, a data storage device is provided comprising a memory and one or more processors. The one or more processors, individually or in combination, are configured to: read data from a portion of the memory, perform a read error handling operation on the data read from the portion of the memory; and in response to the read error handling operation being unsuccessful, identify, in a data structure stored in the data storage device, the portion of the memory as requiring a read verification operation be performed after attempting to program the portion of the memory. In another embodiment, a method is provided that is performed in a data storage device comprising a memory. The method comprises: determining whether a logical wordline is identified in a static program verify data structure as requiring a read verification operation be performed after attempting to program the logical wordline; in response determining that the logical wordline is not identified in the static program verify data structure, determining whether the logical wordline is identified in a dynamic program verify data structure as requiring the read verification operation be performed after attempting to program the logical wordline; and in response determining that the logical wordline is not identified in the dynamic program verify data structure, programming the logical wordline without performing the read verification operation. In yet another embodiment, a data storage device is provided comprising: a memory; and means for: determining whether a string of memory cells is identified is in a first data structure as requiring a read verification operation be performed after attempting to program the string of memory cells; in response determining that the string of memory cells is not identified in the first data structure, determining whether the string of memory cells is identified in a second data structure as requiring the read verification operation be performed after attempting to program the string of memory cells; and in response determining that the string of memory cells is not identified in the second data structure, programming the string of memory cells without performing the read verification operation. Other embodiments are possible, and each of the embodiments can be used alone or together in combination. Accordingly, various embodiments will now be described with reference to the attached drawings. Embodiments The following embodiments relate to a data storage device (DSD). As used herein, a “data storage device” refers to a non-volatile device that stores data. Examples of DSDs include, but are not limited to, hard disk drives (HDDs), solid state drives (SSDs), tape drives, hybrid drives, etc. Details of example DSDs are provided below. Examples of data storage devices suitable for use in implementing aspects of these embodiments are shown in FIGS. 1A-1C. It should be noted that these are merely examples and that other implementations can be used. FIG. 1A is a block diagram illustrating the data storage device 100 according to an embodiment. Referring to FIG. 1A, the data storage device 100 in this example includes a controller 102 coupled with a non-volatile memory that may be made up of one or more non-volatile memory die 104. As used herein, the term die refers to the collection of non-volatile memory cells, and associated circuitry for managing the physical operation of those non-volatile memory cells, that are formed on a single semiconductor su