US-20260128093-A1 - READ-OUT CIRCUITS FOR RRAM-BASED CROSSBAR CIRCUITS
Abstract
The present disclosure provides read-out circuits for crossbar circuits. A crossbar circuit may include a plurality of bit lines intersecting with a plurality of word lines and a plurality of cross-point devices. Each of the plurality of cross-point devices is connected to at least one of the plurality of word lines and at least one of the plurality of bit lines. The crossbar circuit may further include an output sensor that generates a digital output representative of a sum of currents flowing through one or more bit lines of the crossbar circuit. The output sensor includes a first transistor serially connected to a second transistor and an analog-to-digital converter configured to output the digital output. The read-out circuit is an open loop circuit. The read-out circuit may be selectively connected to one of the plurality of bit lines to perform a read operation.
Inventors
- Hengfang Zhu
- Wenbo Yin
- Ning Ge
Assignees
- TETRAMEM INC.
Dates
- Publication Date
- 20260507
- Application Date
- 20251229
Claims (13)
- 1 . An apparatus, comprising: a plurality of cross-point devices connected to a plurality of word lines and a plurality of bit lines; and a read-out circuit configured to convert a sum of currents flowing through one or more of the bit lines into a voltage signal, the readout circuit comprising: a first transistor serially connected to a second transistor.
- 2 . The apparatus of claim 1 , further comprising an analog-to-digital converter configured to convert the voltage signal into a digital output.
- 3 . The apparatus of claim 2 , wherein a connection point of the first transistor and the second transistor is selectively connected to an input of the analog-to-digital converter to provide the output voltage.
- 4 . The apparatus of claim 3 , wherein the read-out circuit further comprises a first resistor, wherein the first transistor is connected to the second transistor via the first resistor.
- 5 . The apparatus of claim 3 , wherein the input of the analog-to-digital converter is further connected to a first terminal of a capacitor.
- 6 . The apparatus of claim 5 , wherein a second terminal of the capacitor is connected to ground.
- 7 . The apparatus of claim 1 , wherein a drain of the first transistor is connected to a source of the second transistor.
- 8 . The apparatus of claim 5 , wherein a first gate of the first transistor is connected to a bit line reference voltage.
- 9 . The apparatus of claim 8 , wherein a second gate of the second transistor is selectively connected to one or more of the plurality of bit lines.
- 10 . The apparatus of claim 9 , wherein a source of the second transistor is connected to a voltage supply via a second resistor.
- 11 . The apparatus of claim 1 , further comprising a first plurality of switches configured to selectively connect the plurality of bit lines to a gate of the second transistor.
- 12 . The apparatus of claim 11 , further comprising a second plurality of switches configured to selectively connect the plurality of bit lines to a source of the first transistor.
- 13 . The apparatus of claim 1 , wherein the cross-point devices comprise at least one of a memristor, a phase-change memory (PCM) device, a floating gate device, a spintronic device, a ferroelectric device, or a resistive random-access memory (RRAM) device.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS The present application is a continuation of U.S. patent application Ser. No. 18/587,561, filed Feb. 26, 2024, which is incorporated by reference in its entirety. TECHNICAL FIELD The implementations of the disclosure relate generally to electronic circuits and, more specifically, to read-out circuits for crossbar circuits including resistive random-access memory (RRAM or ReRAM) devices. BACKGROUND A crossbar circuit may refer to a circuit structure with interconnecting electrically conductive lines sandwiching a memory element, such as a resistive switching material, at their intersections. The resistive switching material may include, for example, a memristor (also referred to as resistive random-access memory (RRAM or ReRAM)). Crossbar circuits may be used to implement in-memory computing applications, non-volatile solid-state memory, image processing applications, neural networks, etc. SUMMARY The following is a simplified summary of the disclosure to provide a basic understanding of some aspects of the disclosure. This summary is not an extensive overview of the disclosure. It is intended to neither identify key or critical elements of the disclosure, nor delineate any scope of the particular implementations of the disclosure or any scope of the claims. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to the more detailed description that is presented later. According to one or more aspects of the present disclosure, an apparatus is provided. The apparatus includes a plurality of bit lines intersecting with a plurality of word lines, a plurality of cross-point devices, and at least one output sensor that generates a digital output representative of a sum of currents flowing through a first bit line of the plurality of bit lines. Each of the plurality of cross-point devices is connected to at least one of the plurality of word lines and at least one of the plurality of bit lines. The output sensor includes a first transistor serially connected to a second transistor and an analog-to-digital converter configured to output the digital output. In some embodiments, a drain of the first transistor is connected to an input of the analog-to-digital converter. In some embodiments, the drain of the first transistor is further connected to a drain of the second transistor. In some embodiments, the output sensor further includes a first resistor, wherein the drain of the first transistor is connected to the source of the second transistor via the first resistor. In some embodiments, a gate of the first transistor is connected to a bit line reference voltage. In some embodiments, a gate of the second transistor is connected to a second bit line of the plurality of bit lines. In some embodiments, a source of the second transistor is connected to a voltage supply via a second resistor. In some embodiments, the apparatus further includes a first plurality of switches configured to selectively connect the plurality of bit lines to a gate of the second transistor. In some embodiments, the apparatus further includes a second plurality of switches configured to selectively connect the plurality of bit lines to a source of the first transistor. In some embodiments, the input of the analog-to-digital converter is further connected to a first terminal of a capacitor. In some embodiments, a second terminal of the capacitor is connected to ground. In some embodiments, the cross-point devices include at least one of a memristor, a phase-change memory (PCM) device, a floating gate device, a spintronic device, a ferroelectric device, or a resistive random-access memory (RRAM) device. BRIEF DESCRIPTION OF THE DRAWINGS The disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure. The drawings, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding. FIG. 1 is a diagram illustrating an example of a crossbar circuit in accordance with some embodiments of the present disclosure. FIGS. 2A and 2B are schematic diagrams illustrating example cross-point devices in accordance with some embodiments of the present disclosure. FIG. 3 is a circuit diagram illustrating an example crossbar circuit in accordance with one implementation of the present disclosure. FIG. 4 is a circuit diagram illustrating an example crossbar circuit in accordance with another implementation of the present disclosure. DETAILED DESCRIPTION Aspects of the disclosure provide read-out circuits for crossbar circuits including resistive random-access memory (RRAM or ReRAM) devices. A crossbar circuit may include intersecting electrically conductive wires (e.g., row lines, column lines, etc.) and cross-point devices arranged in one or more arrays. Each of the cross-point devices may be connected to a word line, a bit line