US-20260128110-A1 - MAGNETIC MEMORY DEVICE

US20260128110A1US 20260128110 A1US20260128110 A1US 20260128110A1US-20260128110-A1

Abstract

A magnetic memory device, including: a cell array including: a memory cell comprising a first magnetic tunnel junction element, and a one-time-programmable (OTP) cell comprising a second magnetic tunnel junction element; and a control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell, and determining whether a resistance of the OTP cell changes after the write current is applied to the OTP cell.

Inventors

Dae Shik Kim

Assignees

SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20250724
Priority Date: 20241106

Claims (20)

1 . A magnetic memory device comprising: a cell array comprising: a memory cell comprising a first magnetic tunnel junction element, and a one-time-programmable (OTP) cell comprising a second magnetic tunnel junction element; and a control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell, and determining whether a resistance of the OTP cell changes after the write current is applied to the OTP cell.
2 . The magnetic memory device of claim 1 , wherein the cell array further comprises a reference cell comprising a third magnetic tunnel junction element, and wherein the control circuit is further configured to determine whether the resistance of the OTP cell changes using the reference cell.
3 . The magnetic memory device of claim 1 , wherein the control circuit is further configured to determine whether the resistance of the OTP cell changes using a reference resistor having a fixed resistance value.
4 . The magnetic memory device of claim 1 , wherein the cell array further comprises: a first reference cell comprising a third magnetic tunnel junction element, and a second reference cell including a fourth magnetic tunnel junction element, and wherein the control circuit is further configured to perform the read operation on the memory cell using the first reference cell and the second reference cell, and control whether the resistance of the OTP cell changes using the first reference cell and the second reference cell
5 . The magnetic memory device of claim 4 , wherein the first reference cell is connected to a first input/output circuit, and wherein the second reference cell is connected to a second input/output circuit different from the first input/output circuit.
6 . The magnetic memory device of claim 1 , wherein the control circuit is further configured to determine whether the resistance of the OTP cell changes based on a change in a magnitude of the write current while the write current is applied to the OTP cell.
7 . The magnetic memory device of claim 1 , wherein the memory cell is connected to a first word line, and wherein the OTP cell is connected to a second word line different from the first word line.
8 . The magnetic memory device of claim 1 , wherein the memory cell is connected to a first bit line, and wherein the OTP cell are connected to a second bit line different from the first bit line.
9 . The magnetic memory device of claim 1 , wherein the memory cell is connected to a first input/output circuit, and wherein the OTP cell is connected to a second input/output circuit different from the first input/output circuit.
10 . The magnetic memory device of claim 1 , wherein the memory cell and the OTP cell are connected to a same input/output circuit.
11 . The magnetic memory device of claim 1 , wherein the OTP cell is connected to a bit line and a source line, and wherein the write current comprises a first write current which flows from the bit line to the source line, and a second write current which flows from the source line to the bit line.
12 . The magnetic memory device of claim 1 , wherein a magnitude of the write current is smaller than a magnitude of a break-down current for writing the OTP cell in a break-down state.
13 . A magnetic memory device comprising: a cell array comprising: a memory cell comprising a first magnetic tunnel junction element and a first cell transistor, and an OTP cell comprising a second magnetic tunnel junction element and a second cell transistor; and a control circuit configured to: apply a write current to the memory cell to perform a write operation on the memory cell, and apply the write current to the OTP cell to perform a read operation on the OTP cell.
14 . The magnetic memory device of claim 13 , wherein the memory cell further comprises a reference cell comprising a third magnetic tunnel junction element and a third cell transistor, and wherein the control circuit is further configured to perform the read operation on the OTP cell by comparing a read current flowing through the OTP cell with a reference current flowing through the reference cell.
15 . The magnetic memory device of claim 13 , wherein the memory cell further comprises a reference cell including a third cell transistor, wherein the reference cell is connected to a resistor having a constant resistance value, and wherein the control circuit is further configured to perform the read operation on the OTP cell by comparing a read current flowing through the OTP cell with a reference current flowing through the resistor and the reference cell.
16 . The magnetic memory device of claim 13 , wherein the control circuit is further configured to perform the read operation on the OTP cell by determining whether a magnitude of the write current flowing through the OTP cell changes.
17 . The magnetic memory device of claim 13 , wherein the control circuit is further configured to end the write operation on the memory cell based on a change in a magnitude of the write current flowing through the memory cell.
18 . The magnetic memory device of claim 13 , wherein the first cell transistor and the second cell transistor are gated to a same word line.
19 . The magnetic memory device of claim 13 , wherein the first cell transistor is gated to a first word line, and wherein the second cell transistor is gated to a second word line different from the first word line.
20 . A magnetic memory device, comprising: a cell array comprising a reference cell including a first magnetic tunnel junction element, a memory cell, and an OTP cell including a second magnetic tunnel junction element; and a control circuit configured to: perform a read operation on the memory cell using the reference cell, apply a write current to the OTP cell, and perform a read operation on the OTP cell based on a change in a magnitude of a current flowing through the reference cell or the write current.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2024-0156533, filed on Nov. 6, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. BACKGROUND OF THE DISCLOSURE 1. Field The disclosure relates to a magnetic memory device. 2. Description of Related Art As electronic devices become faster and power consumption is reduced, it is increasingly desirable for memory devices to have a high-speed read/write operation and a low operating voltage, which may be provided, for example, by magnetic memory devices. Because magnetic memory devices may be non-volatile and capable of operating at a high speed, they are attracting attention as next-generation memories. One example of a magnetic memory device is a spin transfer torque (STT) magnetic random access memory (MRAM), which may be referred to as STT-MRAM, which may store information using an STT phenomenon. An STT-MRAM may store information by applying a current directly to a magnetic tunnel junction element to induce a magnetization reversal. A highly integrated STT-MRAM may provide high-speed operation and low current operation. A one-time-programmable (OTP) memory may refer to a non-volatile memory in which data is permanently retained using one program operation. An OTP may be used in an application field in which data stability and security are important, with the aim of recording specific information only once and continuing to read it. Because the OTP memory is programmable only once, the information cannot be changed, which ensures the integrity and reliability of the data. The OTP memory may be used in applications in which reliability and security are desirable. For example, the OTP memory may be utilized to store information such as a digital security token, a smart card, a key, a password, a booting code, and a manufacturing/production setting, and may be incorporated as part of a semiconductor chip or provided as an independent chip. If OTP memory is incorporated as part of a chip, it can be implemented at low cost without affecting the performance of the core logic when fully compatible with the logic complementary metal-oxide-semiconductor (CMOS) process. SUMMARY Provided is a magnetic memory device that may perform a read operation of a one-time-programmable (OTP) cell without a reference resistor. However, aspects of the present disclosure are not restricted to the one set forth herein. Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments. In accordance with an aspect of the disclosure, a magnetic memory device includes: a cell array including: a memory cell comprising a first magnetic tunnel junction element, and a one-time-programmable (OTP) cell comprising a second magnetic tunnel junction element; and a control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell, and determining whether a resistance of the OTP cell changes after the write current is applied to the OTP cell. In accordance with an aspect of the disclosure, a magnetic memory device includes: a cell array including: a memory cell comprising a first magnetic tunnel junction element and a first cell transistor, and an OTP cell comprising a second magnetic tunnel junction element and a second cell transistor; and a control circuit configured to: apply a write current to the memory cell to perform a write operation on the memory cell, and apply the write current to the OTP cell to perform a read operation on the OTP cell. In accordance with an aspect of the disclosure, a magnetic memory device includes: a cell array comprising a reference cell including a first magnetic tunnel junction element, a memory cell, and an OTP cell including a second magnetic tunnel junction element; and a control circuit configured to: perform a read operation on the memory cell using the reference cell, apply a write current to the OTP cell, and perform a read operation on the OTP cell based on a change in a magnitude of a current flowing through the reference cell or the write current. BRIEF DESCRIPTION OF THE DRAWINGS The above and other aspects, features, and advantages of certain embodiments of the present disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: FIG. 1 is an exemplary block diagram of a magnetic memory device according to some embodiments; FIG. 2 is exemplary circuit diagram for explaining the magnetic memory device according to some embodiments; FIG. 3 is exemplary circuit diagram for explaining the memory cell according to some embodiments; FIG. 4 is an exemplary circuit diagram for explaining a one-time-programmable (OTP) cell according to some embodiments; FI