US-20260128215-A1 - Multilayer Component, Multilayer Component Assembly, and Methods for Forming a Multilayer Component

US20260128215A1US 20260128215 A1US20260128215 A1US 20260128215A1US-20260128215-A1

Abstract

Multilayer components, assemblies, and methods for forming multilayer components and assemblies are provided. For example, a multilayer component includes a plurality of dielectric layers, including an outer dielectric layer, that are stacked in a Z-direction to form a substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer and disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer. The plurality of vias can be electrically connected to a ground defined on a substrate of a device; the multilayer component can be mounted on a surface of the device or embedded within the device.

Inventors

Caleb Winfrey
Cory Nelson
Jonathan Herr

Assignees

KYOCERA AVX Components Corporation

Dates

Publication Date: 20260507
Application Date: 20251023

Claims (19)

1 . A multilayer component, comprising: a plurality of dielectric layers including an outer dielectric layer, the plurality of dielectric layers stacked in a Z-direction to form a substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer of the plurality of dielectric layers, the conductive layer disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer.
2 . The multilayer component of claim 1 , wherein the substrate defines a perimeter, and wherein each via of the plurality of vias is defined along the perimeter of the substrate such that the plurality of vias surround the conductive layer in an X-direction and a Y-direction, the X-direction and the Y-direction perpendicular to one another and each perpendicular to the Z-direction.
3 . The multilayer component of claim 2 , wherein the perimeter has a generally rectangular shape including four sides, and wherein a portion of the plurality of vias is defined along each of the four sides of the perimeter.
4 . The multilayer component of claim 1 , wherein at least one via of the plurality of vias is plated with a conductive material.
5 . The multilayer component of claim 1 , wherein at least one via of the plurality of vias is filled with a conductive material.
6 . The multilayer component of claim 1 , wherein the substrate defines a perimeter, and wherein the shield layer is formed over the outer dielectric layer such that the shield layer extends to the perimeter of the substrate.
7 . The multilayer component of claim 1 , wherein the conductive layer is a first conductive layer formed over a first dielectric layer of the plurality of dielectric layers, and further comprising a second conductive layer formed over a second dielectric layer of the plurality of dielectric layers, the second conductive layer overlapping the first conductive layer in an X-direction and a Y-direction to form an overlap area, the X-direction and the Y-direction perpendicular to one another and each perpendicular to the Z-direction.
8 . The multilayer component of claim 7 , wherein the first conductive layer is electrically connected to a first terminal and the second conductive layer is electrically connected to a second terminal.
9 . The multilayer component of claim 8 , wherein a first terminal via extends from the first conductive layer to the first terminal, wherein a second terminal via extends from the second conductive layer to the second terminal, and wherein the first terminal and the second terminal are disposed on an outer surface of the substrate.
10 . The multilayer component of claim 1 , wherein the conductive layer defines a signal path, and wherein the signal path comprises an input and an output.
11 . The multilayer component of claim 10 , wherein the signal path comprises at least one corner.
12 . The multilayer component of claim 10 , wherein the input is electrically connected to an input contact pad and the output is electrically connected to an output contact pad, and wherein at least one first contact pad via electrically connects the input of the signal path with the input contact pad and at least one second contact pad via electrically connects the output of the signal path with the output contact pad.
13 . The multilayer component of claim 1 , wherein the multilayer component is configured for embedding in a device.
14 . The multilayer component of claim 1 , further comprising a resistive layer formed over a respective one dielectric layer of the plurality of dielectric layers, the resistive layer disposed between the shield layer and the conductive layer.
15 . An assembly, comprising: a device having a device substrate and a ground defined on the device substrate; and a multilayer component attached to the device substrate, the multilayer component comprising: a plurality of dielectric layers including an outer dielectric layer, the plurality of dielectric layers stacked in a Z-direction to form a multilayer component substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer of the plurality of dielectric layers, the conductive layer disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the multilayer component substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer, wherein each via of the plurality of vias is electrically connected to the ground.
16 . The assembly of claim 15 , wherein the device substrate defines a mounting surface, wherein the multilayer component is embedded within the device such that the multilayer component is spaced apart from the mounting surface of the device substrate in the Z-direction.
17 . The assembly of claim 15 , wherein each via of the plurality of vias extends from the shield layer to a ground terminal, the ground terminal electrically connected to the ground.
18 . The assembly of claim 15 , wherein the multilayer component substrate defines a perimeter, and wherein each via of the plurality of vias is defined along the perimeter of the multilayer component substrate such that the plurality of vias surround the conductive layer in an X-direction and a Y-direction, the X-direction and the Y-direction perpendicular to one another and each perpendicular to the Z-direction.
19 . A method for forming a multilayer component, the method comprising: forming a plurality of dielectric layers, the plurality of dielectric layers including an outer dielectric layer; forming a conductive layer, the conductive layer formed from a conductive material disposed over a respective one dielectric layer of the plurality of dielectric layers; forming a shield layer, the shield layer formed from the conductive material disposed over the outer dielectric layer; stacking the plurality of dielectric layers in a Z-direction to form a substrate; and defining a plurality of vias along the perimeter of the substrate, wherein the plurality of vias extend from the shield layer to an outer surface of the substrate opposite the shield layer along the Z-direction.

Description

RELATED APPLICATIONS The present application is based upon and claims priority to U.S. Provisional Patent Application Ser. No. 63/716,258, having a filing date of Nov. 5, 2024, which is incorporated herein by reference. FIELD The present disclosure relates to multilayer components, such as capacitors and inductors, as well as multilayer component assemblies and methods of manufacturing thereof. BACKGROUND The diversity of modern technical applications creates a need for efficient electronic components and integrated circuits. Components such as capacitors and inductors, among others, are fundamental components used for filtering, coupling, bypassing, and other aspects of such modern applications which may include wireless communications, alarm systems, radar systems, circuit switching, matching networks, and many other applications. A dramatic increase in the packing density of integrated circuits, which can reduce their overall size or space occupied thereby, requires advancements in technology of the constituent components of such circuits. For example, packing a greater number of components more closely together can degrade the performance of an individual component, e.g., due to interference from one or more neighboring components. Many specific aspects of component design, such as capacitor design and inductor design, have thus been a focus for improving their performance characteristics, particularly when embedding or otherwise including such components in circuits or the like. SUMMARY In accordance with one embodiment of the present invention, a multilayer component includes a plurality of dielectric layers including an outer dielectric layer, the plurality of dielectric layers stacked in a Z-direction to form a substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer of the plurality of dielectric layers, the conductive layer disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer. In accordance with another embodiment of the present invention, an assembly includes a device having a device substrate and a ground defined on the device substrate; and a multilayer component attached to the device substrate. The multilayer component includes a plurality of dielectric layers including an outer dielectric layer, the plurality of dielectric layers stacked in a Z-direction to form a multilayer component substrate having a top and a bottom; a conductive layer formed over a respective one dielectric layer of the plurality of dielectric layers, the conductive layer disposed within the stacked plurality of dielectric layers such that the conductive layer is spaced apart from both the top and the bottom of the multilayer component substrate along the Z-direction; a shield layer formed over the outer dielectric layer; and a plurality of vias extending from the shield layer. Each via of the plurality of vias is electrically connected to the ground. In accordance with still another embodiment of the present invention, a method for forming a multilayer component includes forming a plurality of dielectric layers, the plurality of dielectric layers including an outer dielectric layer; forming a conductive layer, the conductive layer formed from a conductive material disposed over a respective one dielectric layer of the plurality of dielectric layers; forming a shield layer, the shield layer formed from the conductive material disposed over the outer dielectric layer; stacking the plurality of dielectric layers in a Z-direction to form a substrate; and defining a plurality of vias along the perimeter of the substrate. The plurality of vias extend from the shield layer to an outer surface of the substrate opposite the shield layer along the Z-direction. Other features and aspects of the present invention are set forth in greater detail below. BRIEF DESCRIPTION OF THE FIGURES A full and enabling disclosure of the present invention, including the best mode thereof to one skilled in the art, is set forth more particularly in the remainder of the specification, including reference to the accompanying figures, in which: FIG. 1 illustrates a schematic cross-section view of an assembly of the prior art; FIG. 2 illustrates a schematic cross-section view of an assembly including a multilayer component of the present invention; FIG. 3 illustrates a top perspective view of the multilayer component of FIG. 2; FIG. 4 illustrates a schematic cross-section view of an assembly of the present invention; FIG. 5 illustrates a schematic cross-section view of another assembly including a multilayer component of the present invention; FIG. 6 illustrates a top perspective view of the multilayer component of FIG. 5; FIG. 7 illustrates a schematic cross-section view of