US-20260128219-A1 - MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME

Abstract

A multilayer ceramic capacitor including a capacitor body; and an external electrode disposed on an outer surface of the capacitor body. The capacitor body includes an active region in which the dielectric layers and the internal electrode layers are alternately disposed, and a cover region in which the dielectric layers are disposed on the upper and lower surfaces of the active region in a stacking direction, the external electrode includes an interface layer disposed on a surface of the active region and an external layer covering the interface layer, the interface layer has a bridge structure including a plurality of leg regions, and a span region disposed between the plurality of leg regions, and the leg region of the interface layer is connected to the internal electrode layer and the span region of the interface layer is disposed on a surface of the dielectric layer.

Inventors

• Kwang Dong SEONG
• Bonggyu Choi
• Dokyeong Lee
• Sunho Yoon
• Jeong Ryeol Kim

Assignees

• SAMSUNG ELECTRO-MECHANICS CO., LTD.

Dates

Publication Date

20260507

Application Date

20250408

Priority Date

20241104

Claims (20)

1. 1 . A multilayer ceramic capacitor, comprising a capacitor body including: a plurality of dielectric layers including a first dielectric layer and a second dielectric layer, and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween; and an external electrode disposed on an outer surface of the capacitor body, wherein the capacitor body includes: an active region including the first dielectric layer and the internal electrode layers, and a cover region including the second dielectric layer, the second dielectric layer being disposed on a first surface of the active region and a second surface of the active region, where the first surface opposes the second surface in a stacking direction, the external electrode includes: an interface layer disposed on a third surface of the active region, and an external layer covering the interface layer, the interface layer has a bridge structure including a body region, a leg region comprising a plurality of leg regions connected to a first portion of the body region, and a span region disposed between the plurality of leg regions, the leg region of the interface layer is connected to the internal electrode layers, the span region of the interface layer is disposed on a surface of the first dielectric layer, and a ratio of a number of internal electrode layers connected to the leg region of the interface layer is greater than or equal to 90% and less than or equal to 100% based on a total number of internal electrode layers in the active region.
2. 2 . The multilayer ceramic capacitor of claim 1 , wherein the leg region of the interface layer extends into an interior of the capacitor body and is connected to the internal electrode layers.
3. 3 . The multilayer ceramic capacitor of claim 1 , wherein the leg region of the interface layer includes an alloy that includes a conductive metal.
4. 4 . The multilayer ceramic capacitor of claim 1 , wherein the leg region of the interface layer includes a Cu-Ni alloy.
5. 5 . The multilayer ceramic capacitor of claim 3 , wherein the leg region of the interface layer includes the alloy in an amount of 60 volume % to 100 volume % based on a total amount of the leg region.
6. 6 . The multilayer ceramic capacitor of claim 1 , wherein the span region of the interface layer includes glass.
7. 7 . The multilayer ceramic capacitor of claim 6 , wherein the glass includes at least one selected from aluminum oxide (Al 2 O 3 ) and silicon dioxide (SiO 2 ).
8. 8 . The multilayer ceramic capacitor of claim 6 , wherein the span region of the interface layer includes the glass in an amount of 60 volume % to 100 volume % based on a total amount of the span region.
9. 9 . The multilayer ceramic capacitor of claim 1 , wherein the body region of the interface layer includes a conductive metal.
10. 10 . The multilayer ceramic capacitor of claim 1 , wherein the body region of the interface layer includes copper (Cu).
11. 11 . The multilayer ceramic capacitor of claim 9 , wherein the body region of the interface layer includes the conductive metal in an amount of 60 volume % to 100 volume % based on a total amount of the body region.
12. 12 . The multilayer ceramic capacitor of claim 1 , wherein the leg region of the interface layer includes an alloy that includes a conductive metal, the span region of the interface layer includes glass, and the body region of the interface layer includes the conductive metal.
13. 13 . The multilayer ceramic capacitor of claim 1 , wherein the leg region of the interface layer includes a Cu-Ni alloy, the span region of the interface layer includes glass, and the body region of the interface layer includes copper (Cu).
14. 14 . The multilayer ceramic capacitor of claim 1 , wherein the internal electrode layers include an alloy at an interface with the interface layer, and the alloy includes a conductive metal.
15. 15 . A multilayer ceramic capacitor, comprising a capacitor body including: a plurality of dielectric layers including a first dielectric layer and a second dielectric layer, and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween; and an external electrode disposed on an outer surface of the capacitor body, wherein the capacitor body includes: an active region including the first dielectric layer and the internal electrode layers, and a cover region including the second dielectric layer, the second dielectric layer being disposed on a first surface of the active region and a second surface of the active region, where the first surface opposes the second surface in a stacking direction, the external electrode includes: an interface layer disposed on a third surface of the active region, and an external layer covering the interface layer, the interface layer has a bridge structure including a body region, a leg region comprising a plurality of leg regions connected to a first portion of the body region, and a span region disposed between the plurality of leg regions, the leg region of the interface layer is connected to the internal electrode layers, the span region of the interface layer is disposed on a surface of the first dielectric layer, the body region of the interface layer includes a conductive metal, the leg region of the interface layer includes an alloy that includes the conductive metal, and the span region of the interface layer includes glass.
16. 16 . The multilayer ceramic capacitor of claim 15 , wherein the conductive metal includes copper (Cu), the alloy includes a Cu-Ni alloy, and the glass includes aluminum oxide (Al 2 O 3 ) and silicon dioxide (SiO 2 ).
17. 17 . A method of manufacturing a multilayer ceramic capacitor, comprising forming an external electrode on a surface of a capacitor body that includes a plurality of dielectric layers including a first dielectric layer, and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween, wherein the external electrode includes an interface layer, and an external layer covering the interface layer, the forming of the external electrode including: applying a metal-organic decomposition (MOD) ink to the surface of the capacitor body, reducing the applied metal-organic decomposition (MOD) ink to form a metal particle film; applying a paste including a conductive metal and a glass composition on the metal particle film; and firing the metal particle film and the applied paste to form the interface layer and the external layer, respectively, wherein the interface layer has a bridge structure including a body region, a leg region comprising a plurality of leg regions connected to a first portion of the body region, and a span region disposed between the plurality of leg regions, the leg region of the interface layer is connected to the internal electrode layers, and the span region of the interface layer is disposed on a surface of the first dielectric layer.
18. 18 . The method of claim 17 , wherein the metal-organic decomposition (MOD) ink includes a metal ligand material, an amine compound, a binder, an antioxidant, and a solvent.
19. 19 . The method of claim 17 , wherein the metal particle film includes metal nanoparticles having a size of 10 nm to 100 nm.
20. 20 . The method of claim 17 , wherein the paste includes the glass composition in an amount of 20 wt % to 40 wt % based on a total amount of the paste.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0154377 filed in the Korean Intellectual Property Office on Nov. 4, 2024, the entire contents of which are incorporated herein by reference. BACKGROUND (a) Technical Field The present disclosure relates to a multilayer ceramic capacitor and a method of manufacturing the same. (b) Description of the Related Art As electronic components using a ceramic material, there are a capacitor, an inductor, a piezoelectric element, a varistor, a thermistor, and the like. Among ceramic electronic components, a multilayer ceramic capacitor (MLCC) may be used in various electronic devices due to advantages such as a small size, a high capacitance, an easy mounting feature, and the like. For example, a multilayer ceramic capacitor may be used in a chip type condenser mounted on a board of several electronic products such as image devices, for example, liquid crystal displays (LCD), plasma display panels (PDP), or the like, computers, personal portable terminals, smartphones, and the like, to serve to charge or discharge electricity therein or therefrom. Recently, with the miniaturization and high-capacitance of MLCCs, research is being conducted on miniaturizing the internal electrode and dielectric thickness, and research is actively being conducted to improve the contact between the internal and external electrodes. To improve the connectivity between the internal and external electrodes, a paste for forming the external electrode with small-sized metal particles applied should be used. However, as the metal particles used become smaller, the cost per particle increases due to the difficulty of synthesis, and the content of other polymers required for dispersion and adhesion of the paste, such as dispersants and binders, relatively increases, which has the side effect of causing this. As the content of other polymers increases, the metal solids content becomes relatively low, which changes the viscosity and rheological properties, affecting the printing characteristics. SUMMARY An embodiment provides a multilayer ceramic capacitor having improved connectivity between internal electrode layers and external electrodes, thereby exhibiting capacitance characteristics and moisture resistance reliability. Another embodiment provides a method of manufacturing a multilayer ceramic capacitor. An embodiment provides a multilayer ceramic capacitor including a capacitor body including a plurality of dielectric layers including a first dielectric layer and a second dielectric layer, and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween; and an external electrode disposed on an outer surface of the capacitor body, wherein the capacitor body: includes an active region including the first dielectric layer and the internal electrode layers, and a cover region including the second dielectric layer, the second dielectric layer is disposed on a first surface and a second surface of the active region, wherein the first surface opposes the second surface in a stacking direction, the external electrode includes an interface layer disposed on a third surface of the active region, and an external layer covering the interface layer, the interface layer has a bridge structure including a body region, a leg region including a plurality of leg regions connected to a first portion of the body region, and a span region disposed between the plurality of leg regions, the leg region of the interface layer is connected to the internal electrode layers, the span region of the interface layer is disposed on a surface of the first dielectric layer, and a ratio of a number of internal electrode layers connected to the leg region of the interface layer is greater than or equal to about 90% and less than or equal to about 100% based on a total number of internal electrode layers in the active region. The leg region of the interface layer may extend into an interior of the capacitor body and be connected to the internal electrode layers. The leg region of the interface layer may include an alloy that may include a conductive metal. The leg region of the interface layer may include a Cu-Ni alloy. The leg region of the interface layer may include the alloy in an amount of about 60 volume% to about 100 volume% based on a total amount of the leg region. The span region of the interface layer may include glass. The glass may include at least one selected from aluminum oxide (Al2O3) and silicon dioxide (SiO2). The span region of the interface layer may include the glass in an amount of about 60 volume % to about 100 volume % based on a total amount of the span region. The body region of the interface layer may include a conductive metal. The body region of the interface layer may include copper (Cu). The body region of the interface layer may include the conductive metal in an amount