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US-20260128540-A1 - EXTENDED CONNECTOR CONTACT FOR MEMORY DEVICES

US20260128540A1US 20260128540 A1US20260128540 A1US 20260128540A1US-20260128540-A1

Abstract

An extension portion of a solid state memory device printed circuit board provides additional ground shielding. In one example, the printed circuit board includes a main body and a connector contact portion at a first end of the main body. The connector contact portion includes pins and an extension portion that provides ground shielding to the pins. Ground pins may be connected to the extension portion by through hole vias. The connector contact portion may be connected to an SFF-8639 port.

Inventors

  • Vishwajith Poojari

Assignees

  • SanDisk Technologies, Inc.

Dates

Publication Date
20260507
Application Date
20241107

Claims (20)

  1. 1 . A solid state memory comprising: a printed circuit board for a solid state memory, the printed circuit board including: a main body; and a connector contact portion at a first end of the main body, the connector contact portion including: a plurality of pins; and an extension portion that provides ground shielding to the plurality of pins.
  2. 2 . The solid state memory of claim 1 , wherein the plurality of pins includes individual transmission (TX) pins paired with individual receiving (RX) pins, wherein at least one pair of a TX pin and an RX pin is adjacent to a first ground pin and a second ground pin.
  3. 3 . The solid state memory of claim 2 , wherein the first ground pin and the second ground pin are connected to the extension portion by a through hole via.
  4. 4 . The solid state memory of claim 2 , wherein each TX/RX pin pair has a width of between approximately 1.8 mm to 2.1 mm, and wherein each TX/RX pin pair has a length of approximately 1.5 mm to 1.6 mm.
  5. 5 . The solid state memory of claim 1 , wherein the plurality of pins and the extension portion are separated by an air gap.
  6. 6 . The solid state memory of claim 5 , wherein the air gap defines a distance between the plurality of pins and the extension portion of between approximately 0.3 mm to 0.5 mm.
  7. 7 . The solid state memory of claim 1 , wherein the first end of the main body includes a first protrusion and a second protrusion, and wherein the connector contact portion is situated between the first protrusion and the second protrusion.
  8. 8 . The solid state memory of claim 7 , wherein the connector contact portion is separated from the first protrusion by a distance between approximately 4.0 mm and 4.5 mm.
  9. 9 . The solid state memory of claim 1 , wherein the extension portion extends from the main body by a distance between approximately 2.0 mm and 2.5 mm.
  10. 10 . The solid state memory of claim 1 , wherein the connector contact portion is connected to an SFF-8639 port.
  11. 11 . A solid state memory device (SSD) connector comprising: a connector contact portion including: a plurality of pins; and an extension portion that provides ground shielding to the plurality of pins, wherein the SSD connector is one of a U.2 connector and a U.3 connector.
  12. 12 . The SSD connector of claim 11 , wherein the plurality of pins includes individual transmission (TX) pins paired with individual receiving (RX) pins, wherein at least one pair of a TX pin and an RX pin is adjacent to a first ground pin and a second ground pin.
  13. 13 . The SSD connector of claim 12 , wherein the first ground pin and the second ground pin are connected to the extension portion by a through hole via.
  14. 14 . The SSD connector of claim 11 , wherein the plurality of pins and the extension portion are separated by an air gap.
  15. 15 . The SSD connector of claim 11 , wherein the connector contact portion is connected to an SFF-8639 port.
  16. 16 . An SFF-8639 connector for a solid state drive (SSD), the connector comprising: an extension portion extending beyond a plurality of pins, wherein the plurality of pins are integrated in a connector contact portion of the connector, wherein the extension portion is an extension of the connector contact portion, and wherein the extension portion provides ground shielding to the plurality of pins.
  17. 17 . The connector of claim 16 , wherein the plurality of pins includes individual transmission (TX) pins paired with individual receiving (RX) pins, wherein at least one pair of a TX pin and an RX pin is adjacent to a first ground pin and a second ground pin.
  18. 18 . The connector of claim 17 , wherein the first ground pin and the second ground pin are connected to the extension portion by a through hole via.
  19. 19 . The connector of claim 16 , wherein the plurality of pins and the extension portion are separated by an air gap.
  20. 20 . The connector of claim 16 , further comprising: a mechanical connection interface configured to provide a mechanical connection to a host device.

Description

BACKGROUND This application relates generally to connectors for electronic devices, and more specifically, to a connector footprint and printed circuit board extension for memory devices. Electronic devices, such as solid state memory devices (“SSDs”), may utilize connectors, such as PCIe Gen4 and Gen5 U.2/U.3 (SFF-8639) connectors for meeting PCIe Gen4 and Gen5 product compliance standards. In particular, these connectors pass PCIe-SIG mandated insertion loss, return loss, and crosstalk specifications to provide reliable data transmission at high speeds. SUMMARY Complex or large-scale memory and/or server systems may have many electronic devices, such as SSDs. However, board outlines of present Gen4 and Gen5 U.2 and U.3 enterprise SSD drives at the connector printed circuit board (PCB) contact area restrict the return current and impede shielding of connector contacts pads. Examples described herein provide a connector PCB contact area that extends beyond previous connector areas and provides additional current paths for ground pins, allowing for improved current flow and shielding without disturbing connector placement and mating. In one embodiment, a solid state memory is described. The solid state memory includes a printed circuit board for a solid state drive. The printed circuit board includes a main body and a connector contact portion at a first end of the main body. The connector contact portion includes a plurality of pins and an extension portion that provides ground shielding to the plurality of pins. In another embodiment a solid state memory device (SSD) connector is described. The connector includes a connector contact portion. The connector contact portion includes a plurality of pins and an extension portion that provides ground shielding to the plurality of pins. The SSD connector is one of a U.2 connector and a U.3 connector. In another embodiment, an SFF-8639 connector for a solid state memory device (SSD) is described. The connector includes an extension portion extending beyond a plurality of pins. The plurality of pins are integrated in a connector contact portion of the connector. The extension portion is an extension of the connector contact portion. The extension portion provides ground shielding to the plurality of pins. Various aspects of the present disclosure provide for improvements in memory devices. The present disclosure can be embodied in various forms. The foregoing summary is intended solely to give a general idea of various aspects of the present disclosure and does not limit the scope of the present disclosure in any way. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram illustrating one example of a system including a data storage device, according to some embodiments. FIG. 2 is a diagram illustrating a PCB of a comparative data storage device. FIG. 3 is a diagram illustrating a connector contact area of the PCB of FIG. 2. FIG. 4 is a diagram illustrating a plan view of the connector contact area of FIG. 3 overlaid with the existing U.2 or U.3 connector footprint and ground connectivity. FIG. 5 is a diagram illustrating a plan view of the connector contact area of FIG. 3 showing the inner reference ground connection voiding and via stitching. FIG. 6 is a diagram illustrating an example PCB of a data storage device with an extension portion, according to some embodiments of the present disclosure. FIG. 7 is a diagram illustrating the extension portion in a connector contact area of the example PCB of FIG. 6, according to some embodiments of the present disclosure. FIG. 8 is a diagram illustrating a connector adjacent to the extension portion in the connector contact area of the example PCB of FIG. 6, according to some embodiments of the present disclosure. FIG. 9 is a diagram illustrating a plan view of the connector contact area of FIG. 7 with a connector footprint and ground connectivity, according to some embodiments of the present disclosure. FIG. 10 is a diagram illustrating a plan view of the connector contact area of FIG. 7 with inner reference ground connection voiding and via stitching, according to some embodiments of the present disclosure. FIG. 11 is a chart illustrating an acceptable operating region for insertion losses according to the PCIE5 SFF-8639 SI Specification. FIG. 12 is a chart illustrating an acceptable operating region for return losses according to the PCIE5 SFF-8639 SI Specification. FIG. 13 is a chart illustrating an acceptable operating region for troublesome near-end cross-talk according to the PCIE5 SFF-8639 SI Specification. FIG. 14 is a chart illustrating an acceptable operating region for troublesome far-end cross-talk according to the PCIE5 SFF-8639 SI Specification. FIG. 15 is chart illustrating a plot of the frequency domain results of a comparative PCIe Gen5 U.2 SFF-8639 connector without the extension portion. FIG. 16 is chart illustrating a plot of the frequency domain results of a U.2 SFF-8639 connector with the exten