Search

US-20260128676-A1 - ADAPTIVE POWER LIMITATION CIRCUIT AND HANDSHAKE DEACTIVATION/REACTIVATION PROTOCOL FOR A MULTIPHASE DCDC CONTROLLER

US20260128676A1US 20260128676 A1US20260128676 A1US 20260128676A1US-20260128676-A1

Abstract

A device includes an adaptive power limitation circuit configured to automatically determine active phases of a DCDC converter based upon power level of the DCDC converter. The adaptive power limitation circuit includes a translinear circuit configured to convert the power level of the DCDC converter to a current level and a clamping circuit, operatively connected to the translinear circuit, configured to clamp a maximum output current of the adaptive power limitation circuit to a predetermined value.

Inventors

  • Alessandro Bacceli
  • Marco Cignoli
  • Giorgio Oddone

Assignees

  • ALLEGRO MICROSYSTEMS, LLC

Dates

Publication Date
20260507
Application Date
20241107

Claims (20)

  1. 1 . A device comprising: an adaptive power limitation circuit configured to automatically determine active phases of a DCDC converter based upon power level of the DCDC converter; the adaptive power limitation circuit including: a translinear circuit configured to convert the power level of the DCDC converter to a current level; and a clamping circuit, operatively connected to the translinear circuit, configured to clamp a maximum output current of the adaptive power limitation circuit to a predetermined value.
  2. 2 . The device according to claim 1 , wherein the translinear circuit includes a plurality of switches configured to generate a reciprocal function.
  3. 3 . The device according to claim 1 , wherein the translinear circuit includes a cascode configured to reduce an early effect of the plurality of switches.
  4. 4 . The device according to claim 1 , wherein the translinear circuit includes an amplifier circuit configured to reduce a β effect of the plurality of switches.
  5. 5 . The device according to claim 1 , wherein the adaptive power limitation circuit includes a mirror circuit operatively connected to the clamping circuit.
  6. 6 . The device according to claim 1 , further comprising: an input signal conditioning circuit, which is operatively connected to the translinear circuit, configured to sense a voltage of the DCDC converter.
  7. 7 . The device according to claim 6 , wherein the current level generated by the adaptive power limitation circuit is a function of a maximum power of the DCDC converter, the sensed voltage of the DCDC converter, and a current scaling factor.
  8. 8 . The device according to claim 7 , wherein the input signal conditioning circuit is configured to generate an input current to the translinear circuit; the input current being a function of a maximum current acceptable by the adaptive power limitation circuit, the sensed voltage of the DCDC converter, and a maximum voltage of the DCDC converter.
  9. 9 . The device according to claim 6 , wherein the input signal conditioning circuit is configured to sense an output voltage of the DCDC converter.
  10. 10 . The device according to claim 9 , wherein the current level generated by the adaptive power limitation circuit is a function of a maximum power of the DCDC converter, the sensed output voltage of the DCDC converter, and a current scaling factor.
  11. 11 . The device according to claim 9 , wherein the input signal conditioning circuit is configured to generate an input current to the translinear circuit; the input current being a function of a maximum current acceptable by the adaptive power limitation circuit, the sensed output voltage of the DCDC converter, and a maximum output voltage of the DCDC converter.
  12. 12 . The device according to claim 6 , wherein the input signal conditioning circuit is configured to measure an input voltage of the DCDC converter.
  13. 13 . The device according to claim 12 , wherein the current level generated by the adaptive power limitation circuit is a function of a maximum power of the DCDC converter, the sensed input voltage of the DCDC converter, and a current scaling factor.
  14. 14 . The device according to claim 1 , wherein the DCDC converter is a two-channel synchronous boost converter controller.
  15. 15 . The device according to claim 1 , wherein the DCDC converter is a two-channel synchronous buck converter controller.
  16. 16 . The device according to claim 1 , wherein the DCDC converter is a single channel synchronous boost converter controller.
  17. 17 . The device according to claim 1 , wherein the DCDC converter is a single channel synchronous buck converter controller.
  18. 18 . The device according to claim 1 , wherein the DCDC converter is a buck-boost controller.
  19. 19 . The device according to claim 1 , wherein the DCDC converter is a multiphase boost converter controller.
  20. 20 . The device according to claim 1 , wherein the DCDC converter is a multiphase buck converter controller.

Description

BACKGROUND DC/DC regulators operate by accepting an input DC voltage that may vary over a given range and output a constant DC voltage to provide a stable and reliable power supply. Fluctuations in power can lead to device malfunction or permanent circuit damage. DC/DC regulators ensure longevity and optimal functioning of many conventional electronic devices. Conventional DC/DC regulators may operate in buck mode (convert an input DC voltage to a lower DC voltage of the same polarity), boost mode (convert an input DC voltage to a higher DC voltage of the same polarity), or buck-boost mode (convert an input DC voltage to a lower or higher DC voltage of the same polarity). As power demands increase, single-phase converters reach their limitations in terms of current handling and efficiency. To counter these limitations, multiphase DCDC converters have been used to meet the increased power demands. Conventional multiphase converters employ multiple converter circuits operating in parallel, sharing the load current. The use of conventional multiphase converters increases current capability by distributing the load current across multiple phases, thereby increasing the overall current handling capacity of the converter. Moreover, the use of conventional multiphase converters reduces output ripple, wherein the phase-shifted operation of individual phases leads to a cancellation effect on the output ripple current, thereby having a cleaner and more stable output voltage and improving the performance of the powered devices. Additionally, conventional multiphase converters achieve higher efficiency compared to conventional single-phase converters due to reduced losses associated with lower RMS currents and better thermal management. Also, conventional multiphase converters, by sharing the load, allow for smaller components in each phase and a more compact overall design. On the other hand, conventional multiphase converters realize switching losses, wherein each phase in a multiphase converter has its own set of switching components, such as MOSFETs, which contribute to switching losses that become more prominent at low loads because the fixed losses are distributed over a smaller output power. Also, conventional multiphase converters realize gate driver losses, wherein gate drivers, which are responsible for turning the MOSFETs ON and OFF, contribute to losses at light loads where the switching frequency remains constant while the output power decreases. Moreover, conventional multiphase converters realize control circuit losses, wherein the circuitry responsible for controlling and synchronizing the phases consumes power that can become a significant portion of the total losses at low loads. Several conventional mitigation techniques can be employed to improve the efficiency of multiphase converters at low output loads. One conventional technique is known as phase shedding, where one or more phases are disabled when the required output power falls below a certain threshold. By reducing the number of active phases, switching and gate driver losses can be minimized. However, implementing this conventional technique introduces additional complexity and cost to the converter design due to additional control circuitry to manage the activation and deactivation of phases. For example, implementing conventional phase shedding presents the challenge of generating power thresholds within the integrated circuit, instead of sensing the input and output voltage of the DCDC converter. The generation of power thresholds within the integrated circuit is topology dependent. Another example of a challenge to implementing conventional phase shedding is the bi-directional communications between requestor and responder devices to achieve highest efficiency and dynamic performance on the regulated voltage. SUMMARY According to an aspect of the disclosure, a device includes an adaptive power limitation circuit configured to automatically determine active phases of a DCDC converter based upon power level of the DCDC converter. The adaptive power limitation circuit includes a translinear circuit configured to convert the power level of the DCDC converter to a current level; and a clamping circuit, operatively connected to the translinear circuit, configured to clamp a maximum current of the adaptive power limitation circuit to a predetermined value. According to another aspect of the disclosure, a system includes a DCDC converter; an adaptive power limitation circuit, operatively connected to the DCDC converter, configured to automatically determine active phases of the DCDC converter based upon power level of the DCDC converter; and a switch-mode controller, operatively connected to the DCDC converter and the adaptive power limitation circuit, configured to control a shedding of phases in the DCDC converter based upon a comparison between the generated current level and an inductor current of the DCDC converter. The adaptive power limit