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US-20260128739-A1 - SEMICONDUCTOR SWITCH

US20260128739A1US 20260128739 A1US20260128739 A1US 20260128739A1US-20260128739-A1

Abstract

A semiconductor switch comprising a first main terminal, a second main terminal, and a control terminal, the semiconductor switch comprising: a high voltage HEMT, the high voltage HEMT comprising a high voltage HEMT source terminal, a high voltage HEMT drain terminal, and a high voltage HEMT gate terminal; a control circuit; and a high voltage transistor device, the high voltage transistor device comprising a transistor device first terminal, a transistor device second terminal, and a transistor device gate terminal; wherein the high voltage HEMT source terminal and the transistor device first terminal are operatively connected to the first main terminal; wherein the high voltage HEMT drain terminal and the transistor device second terminal are operatively connected to the second main terminal; and wherein the high voltage HEMT gate terminal and the transistor device gate terminal are operatively connected to the control terminal via the control circuit.

Inventors

  • Florin Udrea
  • Martin Arnold
  • David Miller
  • Daniel Popa
  • Pooja Sharma
  • Ahmad Bin ARSHAD
  • Juris ARROZY
  • Krzysztof DEBOWSKI

Assignees

  • Cambridge Gan Devices Limited

Dates

Publication Date
20260507
Application Date
20251218
Priority Date
20230918

Claims (17)

  1. 1 . A semiconductor switch comprising a first main terminal, a second main terminal, and a control terminal, the semiconductor switch comprising: a high voltage HEMT, the high voltage HEMT comprising a high voltage HEMT source terminal, a high voltage HEMT drain terminal, and a high voltage HEMT gate terminal; a control circuit; and a high voltage transistor device, the high voltage transistor device comprising a transistor device first terminal, a transistor device second terminal, and a transistor device gate terminal; wherein the high voltage HEMT source terminal and the transistor device first terminal are operatively connected to the first main terminal; wherein the high voltage HEMT drain terminal and the transistor device second terminal are operatively connected to the second main terminal; and wherein the high voltage HEMT gate terminal and the transistor device gate terminal are operatively connected to the control terminal via the control circuit; wherein the control circuit is configurable to modify a switching pattern of the semiconductor switch based on a load condition of the semiconductor switch, wherein modifying the switching pattern of the semiconductor switch comprises modulating gate charge and discharge speed and/or timing for the high voltage HEMT and the high voltage transistor device; and wherein the control circuit is configured such that the high voltage HEMT terminal and the transistor device gate terminal are independently operable.
  2. 2 . The semiconductor switch of claim 1 , wherein the control circuit is configured to detect the load condition.
  3. 3 . The semiconductor switch according to claim 2 , wherein the control circuit is configured to detect the load condition by measuring one or more of the following: a gate voltage of the high voltage HEMT; a gate voltage of the high voltage transistor device; a current through the high voltage HEMT; a current through the high voltage transistor device; and a drain to source voltage of the high voltage HEMT.
  4. 4 . The semiconductor switch, wherein the control circuit is configured to receive the load condition from an external source.
  5. 5 . The semiconductor switch according to claim 4 , wherein the control circuit is configured to receive the load condition as an analog signal.
  6. 6 . The semiconductor switch according to claim 1 , wherein the control circuit comprises a first low voltage auxiliary HEMT, the first low voltage auxiliary HEMT comprising a first auxiliary HEMT source terminal, a first auxiliary HEMT drain terminal, and a first auxiliary HEMT gate terminal; wherein the first auxiliary HEMT source terminal is operatively connected to the high voltage HEMT gate terminal; wherein the first auxiliary HEMT drain terminal is operatively connected to the control terminal; and wherein the control circuit is configured such that modulation of the gate charge speed and timing for the high voltage HEMT is controllable via the first auxiliary HEMT gate terminal.
  7. 7 . The semiconductor switch according to claim 6 , wherein the control circuit further comprises an adjustable current source operatively connected to the first auxiliary HEMT gate terminal; wherein the adjustable current source is configured to control a current feeding the first auxiliary HEMT gate terminal.
  8. 8 . The semiconductor switch according to claim 6 , wherein the control circuit further comprises a second low voltage auxiliary HEMT, the second low voltage auxiliary HEMT comprising a second auxiliary HEMT source terminal, a second auxiliary HEMT drain terminal, and a second auxiliary HEMT gate terminal; wherein the control circuit is configured such that modulation of the gate charge speed and timing for the high voltage HEMT is additionally controllable via the second auxiliary HEMT gate terminal.
  9. 9 . The semiconductor switch according to claim 8 , wherein the first auxiliary HEMT gate terminal and the second auxiliary HEMT gate terminal are independently operable.
  10. 10 . The semiconductor switch according to claim 8 , wherein a switching speed of the second low voltage auxiliary HEMT is lower than a switching speed of the first low voltage auxiliary HEMT.
  11. 11 . The semiconductor switch according to claim 2 , wherein the control circuit is configured to detect the load condition by: measuring a gate voltage of the high voltage transistor device, and comparing the gate voltage with a reference voltage.
  12. 12 . The semiconductor switch according to claim 11 , wherein the control circuit comprises a second auxiliary HEMT operatively connected between the control terminal and the transistor device gate terminal.
  13. 13 . The semiconductor switch according to claim 1 , wherein the control circuit is configured to measure a gate voltage of the high voltage transistor device, and to delay a turn-off of the high voltage HEMT until the gate voltage of the high voltage transistor device falls below a threshold voltage level.
  14. 14 . The semiconductor switch according to claim 1 , comprising: a sensing transistor connected in parallel with the high voltage HEMT and configured to sense a current or voltage through the high voltage HEMT; and wherein the control circuit is configured to: receive a sense signal from the sensing transistor and, when the sense signal is above a threshold sense signal, cause a turn-on speed of the high voltage HEMT to be reduced.
  15. 15 . The semiconductor switch according to claim 6 , wherein the control circuit comprises an adjustment transistor; wherein a gate terminal of the adjustment transistor is configured to be controlled by the sense signal; and wherein a drain terminal of the adjustment transistor is connected between the control terminal and the first auxiliary transistor source terminal such that the adjustment transistor controls a turn-on speed of the high voltage HEMT.
  16. 16 . The semiconductor switch according to claim 1 , wherein the control circuit is part of an interface circuit monolithically integrated with the high voltage HEMT.
  17. 17 . The semiconductor switch according to claim 16 , wherein the interface circuit is a III-nitride interface circuit.

Description

TECHNICAL FIELD The present disclosure relates to a semiconductor switch. Particularly, but not exclusively, the disclosure relates to a parallel switch based on a high-electron-mobility transistor (HEMT) (e.g. a III-nitride HEMT) and a high voltage transistor device such as an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a superjunction. The high voltage transistor device may be a silicon or silicon carbide device. BACKGROUND IGBTs Insulated Gate Bipolar transistors (IGBTs) are silicon devices that employ bipolar conduction while maintaining MOS gate control. The bipolar conduction allows for conductivity modulation of the drift region which in turn results in low on-state resistance. The conductivity modulation depends on the current density level. Above a certain current density level (e.g. 0.1 A/cm2), the excess charged (plasma) brought by the bipolar injection of holes and electrons could be larger than the doping charge level of the drift region and therefore resulting an increase in the conductivity of the drift region. The higher the current density, the larger the plasma created in the drift region and therefore the lower the on-state resistance of the drift region. IGBTs are used as switches in high voltage and high power applications. Their typical blocking voltage range is very wide, from 600 V to 6.5 kV, while typical current range is also very wide and varies from a few Amps to thousands of Amps. The on-state voltage drop across the drift region (the region that blocks the voltage during off-state) is directly proportional to the on-state resistance and therefore a smaller on-state resistance results in a lower voltage drop and a more efficient device in the on-state. The simplest equivalent circuit description of an IGBT is that of a metal-oxide-semiconductor field-effect transistor (MOSFET) device driving the base terminal of a bipolar transistor. Most IGBTs are n-channel devices. For these the MOSFET is an n-channel and the transistor is a pnp transistor. The base region of the pnp transistor is the n-type doped drift region of the IGBT. The total on-state voltage drop of the IGBT is approximately given by the sum of the voltage drop across the base-emitter junction of the pnp transistor, the voltage drop across the drift region and the voltage drop across the n-channel of the MOSFET component. The IGBT conducts no current until the base-emitter junction of the pnp transistor is forward-biased. For this, at room temperature, a minimum voltage drop of 0.7 V (at room temperature) is needed between its main terminals. The collector terminal of the IGBT is defined as the high voltage terminal in the forward conduction, while the emitter terminal is defined as the low voltage terminal in the forward conduction. The gate terminal modulates the channel resistance and therefore modulates the electron injection into the base of the pnp transistor. Note that the collector terminal of the IGBT is in fact the emitter terminal of the pnp transistor and the emitter terminal of the IGBT is in fact both the collector terminal of the pnp transistor and the source terminal of the MOSFET component. The collector junction of the IGBT is the same as emitter-base junction of the PNP transistor. The IGBT has superior on-state characteristics but in general is quite slow due to the need to build and remove the plasma (excess charge of minority carriers, electrons and holes in equilibrium) during the turn-on and turn-off transients. In particular the removal of the plasma is a slow process dictated by (i) the sweeping action of the depletion region, when the voltage builds up in the depletion region and (ii) by the recombination of carriers. The IGBT does not conduct until 0.7 V at room temperature. This voltage level goes down as the temperature is increased. The rate at which it goes down is ˜1.5 to 2 mV/degC. Nevertheless this is considered a weakness of the IGBT. IGBTs are used extensively in motor control applications and they tend to operate at relatively lower frequencies (e.g. 1 to 30 kHz). One of their important applications is that of inverters in electric cars. Here 6 IGBTs (or 6 sets of IGBTs connected in parallel) are used as three half bridges per each of the three phases driving a motor. IGBTs have an interesting temperature behavior. At relatively low on-state voltage drops (low currents) the IGBTs have a negative temperature coefficient—meaning that their on-state voltage drop decreases with temperature while at relatively higher on-state voltage drops (higher currents) the IGBTs have a positive temperature coefficient—meaning that their on-state voltage drop increases with temperature. At low currents the bipolar effect is prominent while at higher currents and eventually during the channel saturation, the MOSFET effect becomes prominent. For a nominal current the IGBTs are generally designed to have a mild positive temperature coeffici